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| author | Stan Shebs <shebs@codesourcery.com> | 1999-04-26 18:34:20 +0000 |
|---|---|---|
| committer | Stan Shebs <shebs@codesourcery.com> | 1999-04-26 18:34:20 +0000 |
| commit | 7a292a7adf506b866905b06b3024c0fd411c4583 (patch) | |
| tree | 5b208bb48269b8a82d5c3a5f19c87b45a62a22f4 /sim/m32r/m32r.c | |
| parent | 1996fae84682e8ddd146215dd2959ad1ec924c09 (diff) | |
| download | gdb-7a292a7adf506b866905b06b3024c0fd411c4583.zip gdb-7a292a7adf506b866905b06b3024c0fd411c4583.tar.gz gdb-7a292a7adf506b866905b06b3024c0fd411c4583.tar.bz2 | |
import gdb-19990422 snapshot
Diffstat (limited to 'sim/m32r/m32r.c')
| -rw-r--r-- | sim/m32r/m32r.c | 124 |
1 files changed, 116 insertions, 8 deletions
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c index 13e71e6..3e5e4aa 100644 --- a/sim/m32r/m32r.c +++ b/sim/m32r/m32r.c @@ -48,6 +48,8 @@ m32r_decode_gdb_ctrl_regnum (int gdb_regnum) int m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) { + int mach = MACH_NUM (CPU_MACH (current_cpu)); + if (rn < 16) SETTWI (buf, a_m32r_h_gr_get (current_cpu, rn)); else @@ -64,13 +66,22 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len m32r_decode_gdb_ctrl_regnum (rn))); break; case PC_REGNUM : - SETTWI (buf, a_m32r_h_pc_get (current_cpu)); + if (mach == MACH_M32R) + SETTWI (buf, m32rbf_h_pc_get (current_cpu)); + else + SETTWI (buf, m32rxf_h_pc_get (current_cpu)); break; case ACCL_REGNUM : - SETTWI (buf, GETLODI (a_m32r_h_accum_get (current_cpu))); + if (mach == MACH_M32R) + SETTWI (buf, GETLODI (m32rbf_h_accum_get (current_cpu))); + else + SETTWI (buf, GETLODI (m32rxf_h_accum_get (current_cpu))); break; case ACCH_REGNUM : - SETTWI (buf, GETHIDI (a_m32r_h_accum_get (current_cpu))); + if (mach == MACH_M32R) + SETTWI (buf, GETHIDI (m32rbf_h_accum_get (current_cpu))); + else + SETTWI (buf, GETHIDI (m32rxf_h_accum_get (current_cpu))); break; default : return 0; @@ -84,6 +95,8 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len int m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) { + int mach = MACH_NUM (CPU_MACH (current_cpu)); + if (rn < 16) a_m32r_h_gr_set (current_cpu, rn, GETTWI (buf)); else @@ -101,20 +114,37 @@ m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len GETTWI (buf)); break; case PC_REGNUM : - a_m32r_h_pc_set (current_cpu, GETTWI (buf)); + if (mach == MACH_M32R) + m32rbf_h_pc_set (current_cpu, GETTWI (buf)); + else + m32rxf_h_pc_set (current_cpu, GETTWI (buf)); break; case ACCL_REGNUM : { - DI val = a_m32r_h_accum_get (current_cpu); + DI val; + if (mach == MACH_M32R) + val = m32rbf_h_accum_get (current_cpu); + else + val = m32rxf_h_accum_get (current_cpu); SETLODI (val, GETTWI (buf)); - a_m32r_h_accum_set (current_cpu, val); + if (mach == MACH_M32R) + m32rbf_h_accum_set (current_cpu, val); + else + m32rxf_h_accum_set (current_cpu, val); break; } case ACCH_REGNUM : { - DI val = a_m32r_h_accum_get (current_cpu); + DI val; + if (mach == MACH_M32R) + val = m32rbf_h_accum_get (current_cpu); + else + val = m32rxf_h_accum_get (current_cpu); SETHIDI (val, GETTWI (buf)); - a_m32r_h_accum_set (current_cpu, val); + if (mach == MACH_M32R) + m32rbf_h_accum_set (current_cpu, val); + else + m32rxf_h_accum_set (current_cpu, val); break; } default : @@ -124,6 +154,84 @@ m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len return -1; /*FIXME*/ } +/* Cover fns for mach independent register accesses. */ + +SI +a_m32r_h_gr_get (SIM_CPU *current_cpu, UINT regno) +{ + switch (MACH_NUM (CPU_MACH (current_cpu))) + { +#ifdef HAVE_CPU_M32RBF + case MACH_M32R : + return m32rbf_h_gr_get (current_cpu, regno); +#endif +#ifdef HAVE_CPU_M32RXF + case MACH_M32RX : + return m32rxf_h_gr_get (current_cpu, regno); +#endif + default : + abort (); + } +} + +void +a_m32r_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) +{ + switch (MACH_NUM (CPU_MACH (current_cpu))) + { +#ifdef HAVE_CPU_M32RBF + case MACH_M32R : + m32rbf_h_gr_set (current_cpu, regno, newval); + break; +#endif +#ifdef HAVE_CPU_M32RXF + case MACH_M32RX : + m32rxf_h_gr_set (current_cpu, regno, newval); + break; +#endif + default : + abort (); + } +} + +USI +a_m32r_h_cr_get (SIM_CPU *current_cpu, UINT regno) +{ + switch (MACH_NUM (CPU_MACH (current_cpu))) + { +#ifdef HAVE_CPU_M32RBF + case MACH_M32R : + return m32rbf_h_cr_get (current_cpu, regno); +#endif +#ifdef HAVE_CPU_M32RXF + case MACH_M32RX : + return m32rxf_h_cr_get (current_cpu, regno); +#endif + default : + abort (); + } +} + +void +a_m32r_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval) +{ + switch (MACH_NUM (CPU_MACH (current_cpu))) + { +#ifdef HAVE_CPU_M32RBF + case MACH_M32R : + m32rbf_h_cr_set (current_cpu, regno, newval); + break; +#endif +#ifdef HAVE_CPU_M32RXF + case MACH_M32RX : + m32rxf_h_cr_set (current_cpu, regno, newval); + break; +#endif + default : + abort (); + } +} + USI m32rbf_h_cr_get_handler (SIM_CPU *current_cpu, UINT cr) { |