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| author | Doug Evans <dje@google.com> | 2010-02-12 02:44:26 +0000 |
|---|---|---|
| committer | Doug Evans <dje@google.com> | 2010-02-12 02:44:26 +0000 |
| commit | 2310652a4f4b6568a96583e6930904e7c25efdcd (patch) | |
| tree | 4f584e44fb4dc2276618b05d1a0302765efa0516 /sim/m32r/decodex.c | |
| parent | 15c3d785c32724ff94d54a613fcb627d1da0b721 (diff) | |
| download | gdb-2310652a4f4b6568a96583e6930904e7c25efdcd.zip gdb-2310652a4f4b6568a96583e6930904e7c25efdcd.tar.gz gdb-2310652a4f4b6568a96583e6930904e7c25efdcd.tar.bz2 | |
Regenerate cgen-derived files.
Diffstat (limited to 'sim/m32r/decodex.c')
| -rw-r--r-- | sim/m32r/decodex.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/sim/m32r/decodex.c b/sim/m32r/decodex.c index 09039aa..9f0a1ba 100644 --- a/sim/m32r/decodex.c +++ b/sim/m32r/decodex.c @@ -178,7 +178,8 @@ static const struct insn_sem m32rxf_insn_sem[] = { M32R_INSN_BTST, M32RXF_INSN_BTST, M32RXF_SFMT_BTST, M32RXF_INSN_PAR_BTST, M32RXF_INSN_WRITE_BTST }, }; -static const struct insn_sem m32rxf_insn_sem_invalid = { +static const struct insn_sem m32rxf_insn_sem_invalid = +{ VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }; @@ -703,7 +704,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_empty: { const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -1951,7 +1952,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_nop: { const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -1987,7 +1988,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_rte: { const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -2491,7 +2492,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sadd: { const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ @@ -2594,7 +2595,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc, extract_sfmt_sc: { const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f +#define FLD(f) abuf->fields.sfmt_empty.f /* Record the fields for the semantic handler. */ |