diff options
author | Doug Evans <dje@google.com> | 2009-11-23 09:37:09 +0000 |
---|---|---|
committer | Doug Evans <dje@google.com> | 2009-11-23 09:37:09 +0000 |
commit | 62836bf48e1a5312afa895ec7730a332e0928e0a (patch) | |
tree | d5e21158d4a16c6f3cfdc5c1e88d00b1e83b87b9 /sim/m32r/decode2.c | |
parent | c90188f694a64cb2b97cb9db99fe0c11aaba43d6 (diff) | |
download | gdb-62836bf48e1a5312afa895ec7730a332e0928e0a.zip gdb-62836bf48e1a5312afa895ec7730a332e0928e0a.tar.gz gdb-62836bf48e1a5312afa895ec7730a332e0928e0a.tar.bz2 |
* cgen-engine.h (EXTRACT_MSB0_SINT): Renamed from EXTRACT_MSB0_INT.
(EXTRACT_LSB0_SINT): Renamed from EXTRACT_LSB0_INT.
plus regenerate cgen files
Diffstat (limited to 'sim/m32r/decode2.c')
-rw-r--r-- | sim/m32r/decode2.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/sim/m32r/decode2.c b/sim/m32r/decode2.c index e9fccce..74a9361 100644 --- a/sim/m32r/decode2.c +++ b/sim/m32r/decode2.c @@ -814,7 +814,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -911,7 +911,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; @@ -973,7 +973,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1033,7 +1033,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; @@ -1056,7 +1056,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; @@ -1083,7 +1083,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; @@ -1114,7 +1114,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, SI f_disp16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); + f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; @@ -1140,7 +1140,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; @@ -1164,7 +1164,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; @@ -1188,7 +1188,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; @@ -1212,7 +1212,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; @@ -1236,7 +1236,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); + f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; @@ -1259,7 +1259,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, #define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); + f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; @@ -1314,7 +1314,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, INT f_simm16; f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1506,7 +1506,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1569,7 +1569,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1632,7 +1632,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -1722,7 +1722,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); + f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_simm8) = f_simm8; @@ -1750,7 +1750,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, INT f_simm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2101,7 +2101,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2193,7 +2193,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2256,7 +2256,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2319,7 +2319,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; @@ -2708,7 +2708,7 @@ m32r2f_decode (SIM_CPU *current_cpu, IADDR pc, f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); + f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; |