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authorDoug Evans <dje@google.com>2009-11-04 05:07:00 +0000
committerDoug Evans <dje@google.com>2009-11-04 05:07:00 +0000
commite9c60591766341af909787c6274576425a73d798 (patch)
tree6800a1c6c118c2a96844392e67e0beb281460463 /sim/m32r/decode.c
parent894a1d7b60b02788cf56614d95c950caafe7f374 (diff)
downloadgdb-e9c60591766341af909787c6274576425a73d798.zip
gdb-e9c60591766341af909787c6274576425a73d798.tar.gz
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* arch.c: Regenerate.
* arch.h: Regenerate. * cpu.c: Regenerate. * cpu.h: Regenerate. * cpu2.c: Regenerate. * cpu2.h: Regenerate. * cpuall.h: Regenerate. * cpux.c: Regenerate. * cpux.h: Regenerate. * decode.c: Regenerate. * decode.h: Regenerate. * decode2.c: Regenerate. * decode2.h: Regenerate. * decodex.c: Regenerate. * decodex.h: Regenerate. * model.c: Regenerate. * model2.c: Regenerate. * modelx.c: Regenerate. * sem-switch.c: Regenerate. * sem.c: Regenerate. * sem2-switch.c: Regenerate. * semx-switch.c: Regenerate.
Diffstat (limited to 'sim/m32r/decode.c')
-rw-r--r--sim/m32r/decode.c188
1 files changed, 144 insertions, 44 deletions
diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c
index 3fdea46..e94ff36 100644
--- a/sim/m32r/decode.c
+++ b/sim/m32r/decode.c
@@ -2,22 +2,23 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+Copyright 1996-2009 Free Software Foundation, Inc.
This file is part of the GNU simulators.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 3 of the License, or
-(at your option) any later version.
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License
-along with this program. If not, see <http://www.gnu.org/licenses/>.
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
@@ -241,7 +242,10 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add;
case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add;
case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add;
- case 15 : itype = M32RBF_INSN_BTST; goto extract_sfmt_btst;
+ case 15 :
+ if ((entire_insn & 0xf8f0) == 0xf0)
+ { itype = M32RBF_INSN_BTST; goto extract_sfmt_btst; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add;
case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add;
case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add;
@@ -254,13 +258,25 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
unsigned int val = (((insn >> 8) & (1 << 0)));
switch (val)
{
- case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl;
- case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp;
+ case 0 :
+ if ((entire_insn & 0xfff0) == 0x1ec0)
+ { itype = M32RBF_INSN_JL; goto extract_sfmt_jl; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xfff0) == 0x1fc0)
+ { itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte;
- case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap;
+ case 29 :
+ if ((entire_insn & 0xffff) == 0x10d6)
+ { itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 31 :
+ if ((entire_insn & 0xfff0) == 0x10f0)
+ { itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb;
case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth;
case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st;
@@ -309,21 +325,42 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
unsigned int val = (((insn >> 0) & (1 << 0)));
switch (val)
{
- case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi;
- case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi;
+ case 0 :
+ if ((entire_insn & 0xf0ff) == 0x5070)
+ { itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xf0ff) == 0x5071)
+ { itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac;
- case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac;
+ case 88 :
+ if ((entire_insn & 0xffff) == 0x5080)
+ { itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 89 :
+ if ((entire_insn & 0xffff) == 0x5090)
+ { itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 95 :
{
unsigned int val = (((insn >> 0) & (3 << 0)));
switch (val)
{
- case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi;
- case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi;
- case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi;
+ case 0 :
+ if ((entire_insn & 0xf0ff) == 0x50f0)
+ { itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xf0ff) == 0x50f1)
+ { itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xf0ff) == 0x50f2)
+ { itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
@@ -348,7 +385,10 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
unsigned int val = (((insn >> 8) & (15 << 0)));
switch (val)
{
- case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop;
+ case 0 :
+ if ((entire_insn & 0xffff) == 0x7000)
+ { itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw;
case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw;
case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
@@ -386,26 +426,53 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
- case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi;
- case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi;
+ case 132 :
+ if ((entire_insn & 0xfff00000) == 0x80400000)
+ { itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 133 :
+ if ((entire_insn & 0xfff00000) == 0x80500000)
+ { itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3;
case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3;
case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3;
case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3;
case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3;
- case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div;
- case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div;
- case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div;
- case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div;
+ case 144 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90000000)
+ { itype = M32RBF_INSN_DIV; goto extract_sfmt_div; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 145 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90100000)
+ { itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 146 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90200000)
+ { itype = M32RBF_INSN_REM; goto extract_sfmt_div; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 147 :
+ if ((entire_insn & 0xf0f0ffff) == 0x90300000)
+ { itype = M32RBF_INSN_REMU; goto extract_sfmt_div; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3;
case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3;
case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3;
- case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16;
+ case 159 :
+ if ((entire_insn & 0xf0ff0000) == 0x90f00000)
+ { itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d;
case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d;
case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d;
- case 166 : itype = M32RBF_INSN_BSET; goto extract_sfmt_bset;
- case 167 : itype = M32RBF_INSN_BCLR; goto extract_sfmt_bset;
+ case 166 :
+ if ((entire_insn & 0xf8f00000) == 0xa0600000)
+ { itype = M32RBF_INSN_BSET; goto extract_sfmt_bset; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 167 :
+ if ((entire_insn & 0xf8f00000) == 0xa0700000)
+ { itype = M32RBF_INSN_BCLR; goto extract_sfmt_bset; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ldb_d;
case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ldb_d;
case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ldh_d;
@@ -413,13 +480,34 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d;
case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq;
case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq;
- case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz;
- case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz;
- case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz;
- case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz;
- case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz;
- case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz;
- case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth;
+ case 184 :
+ if ((entire_insn & 0xfff00000) == 0xb0800000)
+ { itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 185 :
+ if ((entire_insn & 0xfff00000) == 0xb0900000)
+ { itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 186 :
+ if ((entire_insn & 0xfff00000) == 0xb0a00000)
+ { itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 187 :
+ if ((entire_insn & 0xfff00000) == 0xb0b00000)
+ { itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 188 :
+ if ((entire_insn & 0xfff00000) == 0xb0c00000)
+ { itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 189 :
+ if ((entire_insn & 0xfff00000) == 0xb0d00000)
+ { itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 220 :
+ if ((entire_insn & 0xf0ff0000) == 0xd0c00000)
+ { itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 224 : /* fall through */
case 225 : /* fall through */
case 226 : /* fall through */
@@ -456,10 +544,22 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
- case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24;
- case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24;
- case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24;
- case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24;
+ case 0 :
+ if ((entire_insn & 0xff000000) == 0xfc000000)
+ { itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 1 :
+ if ((entire_insn & 0xff000000) == 0xfd000000)
+ { itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 2 :
+ if ((entire_insn & 0xff000000) == 0xfe000000)
+ { itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
+ case 3 :
+ if ((entire_insn & 0xff000000) == 0xff000000)
+ { itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; }
+ itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}