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| author | Nick Clifton <nickc@redhat.com> | 2003-12-11 11:33:44 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2003-12-11 11:33:44 +0000 |
| commit | 16b47b253e65a3d447c57a0dc7a4d0490a3d6628 (patch) | |
| tree | 70e5368bb1b0c30a9e9f3f1bf3c787f4f4b242b9 /sim/m32r/cpu.h | |
| parent | 8bfdb6721b9ed6da6f768f074fd1fd138e16e900 (diff) | |
| download | gdb-16b47b253e65a3d447c57a0dc7a4d0490a3d6628.zip gdb-16b47b253e65a3d447c57a0dc7a4d0490a3d6628.tar.gz gdb-16b47b253e65a3d447c57a0dc7a4d0490a3d6628.tar.bz2 | |
Add support for the m32r2 processor
Diffstat (limited to 'sim/m32r/cpu.h')
| -rw-r--r-- | sim/m32r/cpu.h | 55 |
1 files changed, 54 insertions, 1 deletions
diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h index 738aa1d..a5ecbe3 100644 --- a/sim/m32r/cpu.h +++ b/sim/m32r/cpu.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -124,6 +124,9 @@ union sem_fields { int empty; } fmt_empty; struct { /* */ + UINT f_uimm8; + } sfmt_clrpsw; + struct { /* */ UINT f_uimm4; } sfmt_trap; struct { /* */ @@ -153,6 +156,13 @@ union sem_fields { unsigned char out_h_gr_SI_14; } sfmt_jl; struct { /* */ + SI* i_sr; + INT f_simm16; + UINT f_r2; + UINT f_uimm3; + unsigned char in_sr; + } sfmt_bset; + struct { /* */ SI* i_dr; UINT f_r1; UINT f_uimm5; @@ -628,6 +638,49 @@ struct scache { f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ +#define EXTRACT_IFMT_CLRPSW_VARS \ + UINT f_op1; \ + UINT f_r1; \ + UINT f_uimm8; \ + unsigned int length; +#define EXTRACT_IFMT_CLRPSW_CODE \ + length = 2; \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ + f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \ + +#define EXTRACT_IFMT_BSET_VARS \ + UINT f_op1; \ + UINT f_bit4; \ + UINT f_uimm3; \ + UINT f_op2; \ + UINT f_r2; \ + INT f_simm16; \ + unsigned int length; +#define EXTRACT_IFMT_BSET_CODE \ + length = 4; \ + f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ + f_bit4 = EXTRACT_MSB0_UINT (insn, 32, 4, 1); \ + f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ + f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ + +#define EXTRACT_IFMT_BTST_VARS \ + UINT f_op1; \ + UINT f_bit4; \ + UINT f_uimm3; \ + UINT f_op2; \ + UINT f_r2; \ + unsigned int length; +#define EXTRACT_IFMT_BTST_CODE \ + length = 2; \ + f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ + f_bit4 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \ + f_uimm3 = EXTRACT_MSB0_UINT (insn, 16, 5, 3); \ + f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ + f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ + /* Collection of various things for the trace handler to use. */ typedef struct trace_record { |