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author | Mike Frysinger <vapier@gentoo.org> | 2022-11-01 18:49:48 +0545 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2022-12-21 00:00:01 -0500 |
commit | 9a9db21d129fa42187f1f9ed51ec991573bdfac0 (patch) | |
tree | e34eb3d7555357319fd7ca765c59f34f805ded4d /sim/m32r/cpu.h | |
parent | 63c56923057bd8d6ef878df5bbd500717a8aed2d (diff) | |
download | gdb-9a9db21d129fa42187f1f9ed51ec991573bdfac0.zip gdb-9a9db21d129fa42187f1f9ed51ec991573bdfac0.tar.gz gdb-9a9db21d129fa42187f1f9ed51ec991573bdfac0.tar.bz2 |
sim: m32r: invert sim_cpu storage
The cpu*.h changes are in generated cgen code, but that has been sent
upstream too, so the next regen should include it automatically.
Diffstat (limited to 'sim/m32r/cpu.h')
-rw-r--r-- | sim/m32r/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h index 71a375f..9079b74 100644 --- a/sim/m32r/cpu.h +++ b/sim/m32r/cpu.h @@ -87,7 +87,7 @@ m32rbf_h_psw_set_handler (current_cpu, (x));\ #define GET_H_LOCK() CPU (h_lock) #define SET_H_LOCK(x) (CPU (h_lock) = (x)) } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) +#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware) } M32RBF_CPU_DATA; /* Cover fns for register access. */ |