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author | Doug Evans <dje@google.com> | 1998-01-20 06:17:32 +0000 |
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committer | Doug Evans <dje@google.com> | 1998-01-20 06:17:32 +0000 |
commit | 369fba30897458a842d6f599fde08b45804ebef3 (patch) | |
tree | 3e03819f99ab112e500ab9f13501f5b2eb2c85be /sim/m32r/arch.h | |
parent | 5d07b6cf9e5d11596d26b132761e2a4fbac0728f (diff) | |
download | gdb-369fba30897458a842d6f599fde08b45804ebef3.zip gdb-369fba30897458a842d6f599fde08b45804ebef3.tar.gz gdb-369fba30897458a842d6f599fde08b45804ebef3.tar.bz2 |
* arch.c, arch.h, cpuall.h: New files.
* arch-defs.h: Deleted.
* mloop.in: Renamed from mainloop.in.
* sem.c: Renamed from semantics.c.
* Makefile.in: Update.
* sem-ops.h: Deleted.
* mem-ops.h: Deleted.
start-sanitize-cygnus
Add cgen support for generating files.
end-sanitize-cygnus
(arch): Renamed from CPU.
* decode.c: Redone.
* decode.h: Redone.
* extract.c: Redone.
* model.c: Redone.
* sem-switch.c: Redone.
* sem.c: Renamed from semantics.c, and redone.
* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
(m32r_{fetch,store}_register): New functions.
(model_mark_{get,set}_h_gr): Prefix with m32r_.
(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
(h_cr_{get,set}): Prefix with m32r_.
(do_trap): Fetch state from current_cpu, not current_state.
Call sim_engine_halt instead of engine_halt.
* sim-if.c (alloc_cpu): New function.
(free_state): New function.
(sim_open): Call sim_state_alloc, and malloc space for selected cpu
type. Call sim_analyze_program.
(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
(sim_resume): Handle m32rx.
end-sanitize-m32rx
(sim_stop_reason): Deleted.
(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
(sim_{read,write}): Deleted.
(sim_engine_illegal_insn): New function.
* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
(_sim_cpu): Include member appropriate cpu_data member for the cpu.
(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
(sim_state): Delete members core,events,halt_jmp_buf.
Change `cpu' member to be a pointer to the cpu's struct, rather than
record inside the state struct.
* tconfig.in (WITH_DEVICES): Define here.
(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
Diffstat (limited to 'sim/m32r/arch.h')
-rw-r--r-- | sim/m32r/arch.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/sim/m32r/arch.h b/sim/m32r/arch.h new file mode 100644 index 0000000..562ecaa --- /dev/null +++ b/sim/m32r/arch.h @@ -0,0 +1,64 @@ +/* Simulator header for m32r. + +Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + +This file is part of the GNU Simulators. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +*/ + +#ifndef M32R_ARCH_H +#define M32R_ARCH_H + +#define MAX_INSNS 128 + +#define TARGET_BIG_ENDIAN 1 + +/* Shorthand macro for fetching registers. */ +#define CPU(x) (CPU_CGEN_HW (current_cpu)->x) + +/* Macros to determine which cpus are supported. */ +#define HAVE_CPU_M32R + +/* Enum declaration for mode types. */ +typedef enum mode_type { + MODE_VM, MODE_BI, MODE_QI, MODE_HI, + MODE_SI, MODE_DI, MODE_UBI, MODE_UQI, + MODE_UHI, MODE_USI, MODE_UDI, MODE_SF, + MODE_DF, MODE_XF, MODE_TF, MODE_MAX +} MODE_TYPE; + +#define MAX_MODES ((int) MODE_MAX) + +/* Return name of instruction numbered INSN. */ +#define INSN_NAME(insn) (m32r_cgen_insn_table_entries[insn].name) + +/* Enum declaration for model types. */ +typedef enum model_type { + MODEL_M32R_D, MODEL_TEST, MODEL_MAX +} MODEL_TYPE; + +#define MAX_MODELS ((int) MODEL_MAX) + +/* Enum declaration for unit types. */ +typedef enum unit_type { + UNIT_NONE, UNIT_M32R_D_U_STORE, UNIT_M32R_D_U_LOAD, UNIT_M32R_D_U_EXEC, + UNIT_TEST_U_EXEC, UNIT_MAX +} UNIT_TYPE; + +#define MAX_UNITS (1) + +#endif /* M32R_ARCH_H */ |