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authorNick Clifton <nickc@redhat.com>2003-12-11 11:33:44 +0000
committerNick Clifton <nickc@redhat.com>2003-12-11 11:33:44 +0000
commit16b47b253e65a3d447c57a0dc7a4d0490a3d6628 (patch)
tree70e5368bb1b0c30a9e9f3f1bf3c787f4f4b242b9 /sim/m32r/Makefile.in
parent8bfdb6721b9ed6da6f768f074fd1fd138e16e900 (diff)
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Add support for the m32r2 processor
Diffstat (limited to 'sim/m32r/Makefile.in')
-rw-r--r--sim/m32r/Makefile.in40
1 files changed, 38 insertions, 2 deletions
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
index 18d9d3f..ee3f7e8 100644
--- a/sim/m32r/Makefile.in
+++ b/sim/m32r/Makefile.in
@@ -1,5 +1,5 @@
# Makefile template for Configure for the m32r simulator
-# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
#
# This file is part of GDB, the GNU debugger.
@@ -22,6 +22,7 @@
M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
+M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =
@@ -38,6 +39,7 @@ SIM_OBJS = \
sim-if.o arch.o \
$(M32R_OBJS) \
$(M32RX_OBJS) \
+ $(M32R2_OBJS) \
traps.o devices.o \
$(CONFIG_DEVICES)
@@ -113,10 +115,35 @@ decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
+# M32R2 objs
+
+M32R2F_INCLUDE_DEPS = \
+ $(CGEN_MAIN_CPU_DEPS) \
+ cpu2.h decode2.h eng2.h
+
+m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
+
+# FIXME: Use of `mono' is wip.
+mloop2.c eng2.h: stamp-2mloop
+stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
+ $(SHELL) $(srccom)/genmloop.sh \
+ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
+ -cpu m32r2f -infile $(srcdir)/mloop2.in
+ $(SHELL) $(srcroot)/move-if-change eng.hin eng2.h
+ $(SHELL) $(srcroot)/move-if-change mloop.cin mloop2.c
+ touch stamp-2mloop
+
+mloop2.o: mloop2.c sem2-switch.c $(M32R2F_INCLUDE_DEPS)
+cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
+decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
+sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
+model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
+
m32r-clean:
rm -f mloop.c eng.h stamp-mloop
rm -f mloopx.c engx.h stamp-xmloop
- rm -f stamp-arch stamp-cpu stamp-xcpu
+ rm -f mloop2.c eng2.h stamp-2mloop
+ rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
rm -f tmp-*
# cgen support, enable with --enable-cgen-maint
@@ -148,3 +175,12 @@ stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/
EXTRAFILES="$(CGEN_CPU_SEMSW)"
touch stamp-xcpu
cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
+
+stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
+ $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+ cpu=m32r2f mach=m32r2 SUFFIX=2 \
+ archfile=$(CGEN_CPU_DIR)/m32r.cpu \
+ FLAGS="with-scache with-profile=fn" \
+ EXTRAFILES="$(CGEN_CPU_SEMSW)"
+ touch stamp-2cpu
+cpu2.h sem2-switch.c model2.c decode2.c decode2.h: $(CGEN_MAINT) stamp-2cpu