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author | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
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committer | Stan Shebs <shebs@codesourcery.com> | 1999-04-16 01:35:26 +0000 |
commit | c906108c21474dfb4ed285bcc0ac6fe02cd400cc (patch) | |
tree | a0015aa5cedc19ccbab307251353a41722a3ae13 /sim/m32r/Makefile.in | |
parent | cd946cff9ede3f30935803403f06f6ed30cad136 (diff) | |
download | gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.zip gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.gz gdb-c906108c21474dfb4ed285bcc0ac6fe02cd400cc.tar.bz2 |
Initial creation of sourceware repositorygdb-4_18-branchpoint
Diffstat (limited to 'sim/m32r/Makefile.in')
-rw-r--r-- | sim/m32r/Makefile.in | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in new file mode 100644 index 0000000..3c005b1 --- /dev/null +++ b/sim/m32r/Makefile.in @@ -0,0 +1,95 @@ +# Makefile template for Configure for the m32r simulator +# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. +# Contributed by Cygnus Support. +# +# This file is part of GDB, the GNU debugger. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +## COMMON_PRE_CONFIG_FRAG + +M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o + +CONFIG_DEVICES = dv-sockser.o +CONFIG_DEVICES = + +SIM_OBJS = \ + $(SIM_NEW_COMMON_OBJS) \ + sim-cpu.o \ + sim-hload.o \ + sim-hrw.o \ + sim-model.o \ + sim-reg.o \ + cgen-utils.o cgen-trace.o cgen-scache.o \ + cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ + sim-if.o arch.o \ + $(M32R_OBJS) \ + traps.o devices.o \ + $(CONFIG_DEVICES) + +# Extra headers included by sim-main.h. +SIM_EXTRA_DEPS = \ + $(CGEN_INCLUDE_DEPS) \ + arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h + +SIM_EXTRA_CFLAGS = + +SIM_RUN_OBJS = nrun.o +SIM_EXTRA_CLEAN = m32r-clean + +# This selects the m32r newlib/libgloss syscall definitions. +NL_TARGET = -DNL_TARGET_m32r + +## COMMON_POST_CONFIG_FRAG + +arch = m32r + +sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h + +arch.o: arch.c $(SIM_MAIN_DEPS) + +traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) +devices.o: devices.c $(SIM_MAIN_DEPS) + +# M32R objs + +M32RBF_INCLUDE_DEPS = \ + $(CGEN_MAIN_CPU_DEPS) \ + cpu.h decode.h eng.h + +m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS) + +# FIXME: Use of `mono' is wip. +mloop.c eng.h: stamp-mloop +stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile + $(SHELL) $(srccom)/genmloop.sh \ + -mono -fast -pbb -switch sem-switch.c \ + -cpu m32rbf -infile $(srcdir)/mloop.in + $(SHELL) $(srcroot)/move-if-change eng.hin eng.h + $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c + touch stamp-mloop +mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS) + +cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS) +decode.o: decode.c $(M32RBF_INCLUDE_DEPS) +sem.o: sem.c $(M32RBF_INCLUDE_DEPS) +model.o: model.c $(M32RBF_INCLUDE_DEPS) + + +m32r-clean: + rm -f mloop.c eng.h stamp-mloop + rm -f tmp-* + + |