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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-03-12 14:18:59 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-03-12 14:20:46 +0000 |
| commit | 7fce7ea986bc66d4af3c21d4f6ab2a987f3aac46 (patch) | |
| tree | 08c07d9e7fde9270e9257a54796fc0df721abe83 /sim/m32c | |
| parent | 203a206d14e4892bc4ab9448e08617506b5d613d (diff) | |
| download | gdb-7fce7ea986bc66d4af3c21d4f6ab2a987f3aac46.zip gdb-7fce7ea986bc66d4af3c21d4f6ab2a987f3aac46.tar.gz gdb-7fce7ea986bc66d4af3c21d4f6ab2a987f3aac46.tar.bz2 | |
aarch64: Add few missing system registers
This patch adds few missing system registers to GAS: LORC_EL1,
LOREA_EL1, LORN_EL1, LORSA_EL1, ICC_CTLR_EL3, ICC_SRE_ELX, ICH_VTR_EL2.
gas/ChangeLog:
2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* testsuite/gas/aarch64/illegal-sysreg-7.d: New test.
* testsuite/gas/aarch64/illegal-sysreg-7.l: New test.
* testsuite/gas/aarch64/illegal-sysreg-7.s: New test.
* testsuite/gas/aarch64/sysreg-7.d: New test.
* testsuite/gas/aarch64/sysreg-7.s: New test.
opcodes/ChangeLog:
2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add lorc_el1, lorea_el1, lorn_el1, lorsa_el1,
icc_ctlr_el3, icc_sre_elx, ich_vtr_el2 system registers.
Diffstat (limited to 'sim/m32c')
0 files changed, 0 insertions, 0 deletions