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authorJim Blandy <jimb@codesourcery.com>2006-01-23 22:10:41 +0000
committerJim Blandy <jimb@codesourcery.com>2006-01-23 22:10:41 +0000
commitd45a4bef835fdf220936541e7a08ad9734cdfc21 (patch)
tree9f87d40fe9e9f77ce733ddd4fb811df3581f9333 /sim/m32c/main.c
parentdda63807650967916bae1a29ebf4f9062a089fc7 (diff)
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sim/ChangeLog:
2005-10-06 Jim Blandy <jimb@redhat.com> Add simulator for Renesas M32C and M16C. * m32c: New directory. * configure.ac: Add entry for Renesas M32C. * configure: Regenerate. sim/m32c/ChangeLog: 2005-10-06 Jim Blandy <jimb@redhat.com> Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>, with further work from Jim Blandy <jimb@redhat.com> and Kevin Buettner <kevinb@redhat.com>. * ChangeLog: New. * Makefile.in: New. * blinky.S: New. * config.in: New. * configure: New. * configure.in: New. * cpu.h: New. * gdb-if.c: New. * gloss.S: New. * int.c: New. * int.h: New. * load.c: New. * load.h: New. * m32c.opc: New. * main.c: New. * mem.c: New. * mem.h: New. * misc.c: New. * misc.h: New. * opc2c.c: New. * r8c.opc: New. * reg.c: New. * safe-fgets.c: New. * safe-fgets.h: New. * sample.S: New. * sample.ld: New. * sample2.c: New. * srcdest.c: New. * syscalls.c: New. * syscalls.h: New. * trace.c: New. * trace.h: New.
Diffstat (limited to 'sim/m32c/main.c')
-rw-r--r--sim/m32c/main.c138
1 files changed, 138 insertions, 0 deletions
diff --git a/sim/m32c/main.c b/sim/m32c/main.c
new file mode 100644
index 0000000..541bc43
--- /dev/null
+++ b/sim/m32c/main.c
@@ -0,0 +1,138 @@
+/* main.c --- main function for stand-alone M32C simulator.
+
+Copyright (C) 2005 Free Software Foundation, Inc.
+Contributed by Red Hat, Inc.
+
+This file is part of the GNU simulators.
+
+The GNU simulators are free software; you can redistribute them and/or
+modify them under the terms of the GNU General Public License as
+published by the Free Software Foundation; either version 2 of the
+License, or (at your option) any later version.
+
+The GNU simulators are distributed in the hope that they will be
+useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with the GNU simulators; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA */
+
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <assert.h>
+#include <setjmp.h>
+#include <signal.h>
+
+#include "bfd.h"
+
+#include "cpu.h"
+#include "mem.h"
+#include "misc.h"
+#include "load.h"
+#include "trace.h"
+
+static int disassemble = 0;
+static unsigned int cycles = 0;
+
+static void
+done (int exit_code)
+{
+ if (verbose)
+ {
+ stack_heap_stats ();
+ mem_usage_stats ();
+ printf ("insns: %14s\n", comma (cycles));
+ }
+ exit (exit_code);
+}
+
+int
+main (int argc, char **argv)
+{
+ int o;
+ int save_trace;
+ bfd *prog;
+
+ while ((o = getopt (argc, argv, "tvdm:")) != -1)
+ switch (o)
+ {
+ case 't':
+ trace++;
+ break;
+ case 'v':
+ verbose++;
+ break;
+ case 'd':
+ disassemble++;
+ break;
+ case 'm':
+ if (strcmp (optarg, "r8c") == 0 || strcmp (optarg, "m16c") == 0)
+ default_machine = bfd_mach_m16c;
+ else if (strcmp (optarg, "m32cm") == 0
+ || strcmp (optarg, "m32c") == 0)
+ default_machine = bfd_mach_m32c;
+ else
+ {
+ fprintf (stderr, "Invalid machine: %s\n", optarg);
+ exit (1);
+ }
+ break;
+ case '?':
+ fprintf (stderr,
+ "usage: run [-v] [-t] [-d] [-m r8c|m16c|m32cm|m32c]"
+ " program\n");
+ exit (1);
+ }
+
+ prog = bfd_openr (argv[optind], 0);
+ if (!prog)
+ {
+ fprintf (stderr, "Can't read %s\n", argv[optind]);
+ exit (1);
+ }
+
+ if (!bfd_check_format (prog, bfd_object))
+ {
+ fprintf (stderr, "%s not a m32c program\n", argv[optind]);
+ exit (1);
+ }
+
+ save_trace = trace;
+ trace = 0;
+ m32c_load (prog);
+ trace = save_trace;
+
+ if (disassemble)
+ sim_disasm_init (prog);
+
+ while (1)
+ {
+ int rc;
+
+ if (trace)
+ printf ("\n");
+
+ if (disassemble)
+ sim_disasm_one ();
+
+ enable_counting = verbose;
+ cycles++;
+ rc = decode_opcode ();
+ enable_counting = 0;
+
+ if (M32C_HIT_BREAK (rc))
+ done (1);
+ else if (M32C_EXITED (rc))
+ done (M32C_EXIT_STATUS (rc));
+ else
+ assert (M32C_STEPPED (rc));
+
+ trace_register_changes ();
+ }
+}