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author | Jim Blandy <jimb@codesourcery.com> | 2006-01-23 22:10:41 +0000 |
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committer | Jim Blandy <jimb@codesourcery.com> | 2006-01-23 22:10:41 +0000 |
commit | d45a4bef835fdf220936541e7a08ad9734cdfc21 (patch) | |
tree | 9f87d40fe9e9f77ce733ddd4fb811df3581f9333 /sim/m32c/int.c | |
parent | dda63807650967916bae1a29ebf4f9062a089fc7 (diff) | |
download | gdb-d45a4bef835fdf220936541e7a08ad9734cdfc21.zip gdb-d45a4bef835fdf220936541e7a08ad9734cdfc21.tar.gz gdb-d45a4bef835fdf220936541e7a08ad9734cdfc21.tar.bz2 |
sim/ChangeLog:
2005-10-06 Jim Blandy <jimb@redhat.com>
Add simulator for Renesas M32C and M16C.
* m32c: New directory.
* configure.ac: Add entry for Renesas M32C.
* configure: Regenerate.
sim/m32c/ChangeLog:
2005-10-06 Jim Blandy <jimb@redhat.com>
Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>,
with further work from Jim Blandy <jimb@redhat.com> and
Kevin Buettner <kevinb@redhat.com>.
* ChangeLog: New.
* Makefile.in: New.
* blinky.S: New.
* config.in: New.
* configure: New.
* configure.in: New.
* cpu.h: New.
* gdb-if.c: New.
* gloss.S: New.
* int.c: New.
* int.h: New.
* load.c: New.
* load.h: New.
* m32c.opc: New.
* main.c: New.
* mem.c: New.
* mem.h: New.
* misc.c: New.
* misc.h: New.
* opc2c.c: New.
* r8c.opc: New.
* reg.c: New.
* safe-fgets.c: New.
* safe-fgets.h: New.
* sample.S: New.
* sample.ld: New.
* sample2.c: New.
* srcdest.c: New.
* syscalls.c: New.
* syscalls.h: New.
* trace.c: New.
* trace.h: New.
Diffstat (limited to 'sim/m32c/int.c')
-rw-r--r-- | sim/m32c/int.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/sim/m32c/int.c b/sim/m32c/int.c new file mode 100644 index 0000000..8f03515 --- /dev/null +++ b/sim/m32c/int.c @@ -0,0 +1,61 @@ +/* int.c --- M32C interrupt handling. + +Copyright (C) 2005 Free Software Foundation, Inc. +Contributed by Red Hat, Inc. + +This file is part of the GNU simulators. + +The GNU simulators are free software; you can redistribute them and/or +modify them under the terms of the GNU General Public License as +published by the Free Software Foundation; either version 2 of the +License, or (at your option) any later version. + +The GNU simulators are distributed in the hope that they will be +useful, but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +You should have received a copy of the GNU General Public License +along with the GNU simulators; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA +02110-1301, USA */ + + +#include "int.h" +#include "cpu.h" +#include "mem.h" + +void +trigger_fixed_interrupt (int addr) +{ + int s = get_reg (sp); + int f = get_reg (flags); + int p = get_reg (pc); + + if (A16) + { + s -= 4; + put_reg (sp, s); + mem_put_hi (s, p); + mem_put_qi (s + 2, f); + mem_put_qi (s + 3, ((f >> 4) & 0x0f) | (p >> 16)); + } + else + { + s -= 6; + put_reg (sp, s); + mem_put_si (s, p); + mem_put_hi (s + 4, f); + } + put_reg (pc, mem_get_psi (addr)); + set_flags (FLAGBIT_U | FLAGBIT_I | FLAGBIT_D, 0); +} + +void +trigger_based_interrupt (int vector) +{ + int addr = get_reg (intb) + vector * 4; + if (vector <= 31) + set_flags (FLAGBIT_U, 0); + trigger_fixed_interrupt (addr); +} |