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author | Mike Frysinger <vapier@gentoo.org> | 2015-04-16 02:11:12 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2015-04-17 02:44:30 -0400 |
commit | 034685f9ce92cf6dfb6656745365b6a5904a8e84 (patch) | |
tree | c4b591263048d0a9d89af68c9abd8e69786ed2f7 /sim/lm32 | |
parent | 27b97b40bca216097d16d53fa9408a70cd281479 (diff) | |
download | gdb-034685f9ce92cf6dfb6656745365b6a5904a8e84.zip gdb-034685f9ce92cf6dfb6656745365b6a5904a8e84.tar.gz gdb-034685f9ce92cf6dfb6656745365b6a5904a8e84.tar.bz2 |
sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
Diffstat (limited to 'sim/lm32')
-rw-r--r-- | sim/lm32/ChangeLog | 8 | ||||
-rw-r--r-- | sim/lm32/dv-lm32cpu.c | 4 | ||||
-rw-r--r-- | sim/lm32/sim-main.h | 3 | ||||
-rw-r--r-- | sim/lm32/traps.c | 4 |
4 files changed, 12 insertions, 7 deletions
diff --git a/sim/lm32/ChangeLog b/sim/lm32/ChangeLog index 6464b77..e536d31 100644 --- a/sim/lm32/ChangeLog +++ b/sim/lm32/ChangeLog @@ -1,3 +1,11 @@ +2015-04-17 Mike Frysinger <vapier@gentoo.org> + + * dv-lm32cpu.c (deliver_lm32cpu_interrupt): Change CIA_GET to + CPU_PC_GET. + (lm32cpu_port_event): Likewise. + * sim-main.h (CIA_GET, CIA_SET): Delete. + * traps.c (lm32_core_signal): Change CIA_SET to CPU_PC_SET. + 2015-04-15 Mike Frysinger <vapier@gentoo.org> * Makefile.in (SIM_OBJS): Delete sim-cpu.o. diff --git a/sim/lm32/dv-lm32cpu.c b/sim/lm32/dv-lm32cpu.c index 7087f0b..bdd64f3 100644 --- a/sim/lm32/dv-lm32cpu.c +++ b/sim/lm32/dv-lm32cpu.c @@ -137,7 +137,7 @@ deliver_lm32cpu_interrupt (struct hw *me, void *data) struct lm32cpu *controller = hw_data (me); SIM_DESC sd = hw_system (me); sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */ - address_word cia = CIA_GET (cpu); + address_word cia = CPU_PC_GET (cpu); int interrupt = (int) data; @@ -192,7 +192,7 @@ lm32cpu_port_event (struct hw *me, struct lm32cpu *controller = hw_data (me); SIM_DESC sd = hw_system (me); sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */ - address_word cia = CIA_GET (cpu); + address_word cia = CPU_PC_GET (cpu); HW_TRACE ((me, "interrupt event on port %d, level %d", my_port, level)); diff --git a/sim/lm32/sim-main.h b/sim/lm32/sim-main.h index dcb5ac0..52122d2 100644 --- a/sim/lm32/sim-main.h +++ b/sim/lm32/sim-main.h @@ -38,9 +38,6 @@ typedef struct _sim_cpu SIM_CPU; /* These must be defined before sim-base.h. */ typedef USI sim_cia; -#define CIA_GET(cpu) CPU_PC_GET (cpu) -#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) - #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \ do { \ if (cpu) /* null if ctrl-c */ \ diff --git a/sim/lm32/traps.c b/sim/lm32/traps.c index 3070323..777e7b5 100644 --- a/sim/lm32/traps.c +++ b/sim/lm32/traps.c @@ -245,7 +245,7 @@ lm32_core_signal (SIM_DESC sd, SET_H_GR (30, ip); /* Save and clear interrupt enable. */ SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 1) << 1); - CIA_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32); + CPU_PC_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32); sim_engine_halt (sd, cpu, NULL, LM32_EID_DATA_BUS_ERROR * 32, sim_stopped, SIM_SIGSEGV); break; @@ -257,7 +257,7 @@ lm32_core_signal (SIM_DESC sd, SET_H_GR (30, ip); /* Save and clear interrupt enable. */ SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 1) << 1); - CIA_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32); + CPU_PC_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32); sim_engine_halt (sd, cpu, NULL, LM32_EID_DATA_BUS_ERROR * 32, sim_stopped, SIM_SIGBUS); break; |