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authorMike Frysinger <vapier@gentoo.org>2015-04-16 02:11:12 -0400
committerMike Frysinger <vapier@gentoo.org>2015-04-17 02:44:30 -0400
commit034685f9ce92cf6dfb6656745365b6a5904a8e84 (patch)
treec4b591263048d0a9d89af68c9abd8e69786ed2f7 /sim/lm32/traps.c
parent27b97b40bca216097d16d53fa9408a70cd281479 (diff)
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sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET} except the latter adds a layer of indirection via the sim state. This lets models set up different functions at runtime and doesn't reach so directly into the arch-specific cpu state. It also doesn't make sense to have two sets of macros that do exactly the same thing, so lets standardize on the one that gets us more.
Diffstat (limited to 'sim/lm32/traps.c')
-rw-r--r--sim/lm32/traps.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/lm32/traps.c b/sim/lm32/traps.c
index 3070323..777e7b5 100644
--- a/sim/lm32/traps.c
+++ b/sim/lm32/traps.c
@@ -245,7 +245,7 @@ lm32_core_signal (SIM_DESC sd,
SET_H_GR (30, ip);
/* Save and clear interrupt enable. */
SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 1) << 1);
- CIA_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
+ CPU_PC_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
sim_engine_halt (sd, cpu, NULL, LM32_EID_DATA_BUS_ERROR * 32,
sim_stopped, SIM_SIGSEGV);
break;
@@ -257,7 +257,7 @@ lm32_core_signal (SIM_DESC sd,
SET_H_GR (30, ip);
/* Save and clear interrupt enable. */
SET_H_CSR (LM32_CSR_IE, (GET_H_CSR (LM32_CSR_IE) & 1) << 1);
- CIA_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
+ CPU_PC_SET (cpu, GET_H_CSR (LM32_CSR_EBA) + LM32_EID_DATA_BUS_ERROR * 32);
sim_engine_halt (sd, cpu, NULL, LM32_EID_DATA_BUS_ERROR * 32,
sim_stopped, SIM_SIGBUS);
break;