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author | Jon Beniston <jon@beniston.com> | 2009-05-18 13:25:35 +0000 |
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committer | Jon Beniston <jon@beniston.com> | 2009-05-18 13:25:35 +0000 |
commit | c28c63d86bd759c7595e85ef13949502e95fd58a (patch) | |
tree | 8e92b3eae117e835065d07dff9a4c85804306967 /sim/lm32/lm32.c | |
parent | 739fc47ac9a6169d7b12e82a3ec6ce8472354f78 (diff) | |
download | gdb-c28c63d86bd759c7595e85ef13949502e95fd58a.zip gdb-c28c63d86bd759c7595e85ef13949502e95fd58a.tar.gz gdb-c28c63d86bd759c7595e85ef13949502e95fd58a.tar.bz2 |
gdb/
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add lm32 target.
* Makefile.in: Add lm32 dependencies.
* NEWS: Indicate lm32 is a new target.
* configure.tgt: Add lm32 targets.
* lm32-tdep.c: New file.
gdb/testsuite
2009-05-18 Jon Beniston <jon@beniston.com>
* gdb.asm/asm-source.exp: Add lm32 target.
include/gdb/
2009-05-18 Jon Beniston <jon@beniston.com>
* sim-lm32.h: New file.
sim/
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add Jon Beniston as maintainer of lm32 sim.
* configure.ac: Add lm32 target.
* lm32: New directory.
sim/common
2009-05-18 Jon Beniston <jon@beniston.com>
* gennltvals.sh: Add lm32 target.
* nltvals.def: Add lm32 syscall definitions.
sim/lm32/
2009-05-18 Jon Beniston <jon@beniston.com>
* Makefile.in: New file.
* arch.c: New file.
* arch.h: New file.
* config.in: New file.
* configure: New file.
* configure.ac: New file.
* cpu.c: New file.
* cpu.h: New file.
* cpuall.h: New file.
* decode.c: New file.
* decode.h: New file.
* dv-lm32cpu.c: New file.
* dv-lm32timer.c: New file.
* dv-lm32uart.c: New file.
* lm32.c: New file.
* lm32-sim.h: New file.
* mloop.in: New file.
* model.c: New file.
* sem.c: New file.
* sem-switch.c: New file.
* sim-if.c: New file.
* sim-main.c: New file.
* tconfig.in: New file.
* traps.c: New file.
* user.c: New file.
Diffstat (limited to 'sim/lm32/lm32.c')
-rw-r--r-- | sim/lm32/lm32.c | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/sim/lm32/lm32.c b/sim/lm32/lm32.c new file mode 100644 index 0000000..2691c39 --- /dev/null +++ b/sim/lm32/lm32.c @@ -0,0 +1,100 @@ +/* Lattice Mico32 simulator support code. + Contributed by Jon Beniston <jon@beniston.com> + + Copyright (C) 2009 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#define WANT_CPU lm32bf +#define WANT_CPU_LM32BF + +#include "sim-main.h" +#include "cgen-mem.h" +#include "cgen-ops.h" + +/* The contents of BUF are in target byte order. */ + +int +lm32bf_fetch_register (SIM_CPU * current_cpu, int rn, unsigned char *buf, + int len) +{ + if (rn < 32) + SETTSI (buf, lm32bf_h_gr_get (current_cpu, rn)); + else + switch (rn) + { + case SIM_LM32_PC_REGNUM: + SETTSI (buf, lm32bf_h_pc_get (current_cpu)); + break; + default: + return 0; + } + + return -1; +} + +/* The contents of BUF are in target byte order. */ + +int +lm32bf_store_register (SIM_CPU * current_cpu, int rn, unsigned char *buf, + int len) +{ + if (rn < 32) + lm32bf_h_gr_set (current_cpu, rn, GETTSI (buf)); + else + switch (rn) + { + case SIM_LM32_PC_REGNUM: + lm32bf_h_pc_set (current_cpu, GETTSI (buf)); + break; + default: + return 0; + } + + return -1; +} + + + +#if WITH_PROFILE_MODEL_P + +/* Initialize cycle counting for an insn. + FIRST_P is non-zero if this is the first insn in a set of parallel + insns. */ + +void +lm32bf_model_insn_before (SIM_CPU * cpu, int first_p) +{ +} + +/* Record the cycles computed for an insn. + LAST_P is non-zero if this is the last insn in a set of parallel insns, + and we update the total cycle count. + CYCLES is the cycle count of the insn. */ + +void +lm32bf_model_insn_after (SIM_CPU * cpu, int last_p, int cycles) +{ +} + +int +lm32bf_model_lm32_u_exec (SIM_CPU * cpu, const IDESC * idesc, + int unit_num, int referenced) +{ + return idesc->timing->units[unit_num].done; +} + +#endif /* WITH_PROFILE_MODEL_P */ |