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| author | Andrew Cagney <cagney@redhat.com> | 2002-06-17 21:44:06 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2002-06-17 21:44:06 +0000 |
| commit | 78e731cd36da5f52b759bbf36cc1eb5d79de38c8 (patch) | |
| tree | 9566f0e964930728f09a6fc69807de212ea3624e /sim/igen/gen.c | |
| parent | b5d78d39b04b4dcc1197fd0c9470852370539aa6 (diff) | |
| download | gdb-78e731cd36da5f52b759bbf36cc1eb5d79de38c8.zip gdb-78e731cd36da5f52b759bbf36cc1eb5d79de38c8.tar.gz gdb-78e731cd36da5f52b759bbf36cc1eb5d79de38c8.tar.bz2 | |
* gen.c (gen_entry_expand_opcode): Initialize ``value'' to -1 and
``t'' to NULL.
* igen.c (main): Add default case to switch.
* gen-icache.c (print_icache_extraction): Ditto.
Diffstat (limited to 'sim/igen/gen.c')
| -rw-r--r-- | sim/igen/gen.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/igen/gen.c b/sim/igen/gen.c index 7c24b46..156c929 100644 --- a/sim/igen/gen.c +++ b/sim/igen/gen.c @@ -1025,9 +1025,9 @@ gen_entry_expand_opcode (gen_entry *table, } case insn_field_cond_field: { - int value; + int value = -1; opcode_bits *bit; - gen_entry *t; + gen_entry *t = NULL; /* Try to find a value for the conditional by looking back through the previously defined bits for one |