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author | Andrew Cagney <cagney@redhat.com> | 1997-02-21 02:49:21 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-02-21 02:49:21 +0000 |
commit | a4c97499d90ab83a01d80d4c3df2455a73486e3c (patch) | |
tree | 9a52d25e56a06fec8fa103dbeb4d7477b1f5d23c /sim/igen/gen-icache.h | |
parent | 317df3b530276f2acbdf8950d1d9b76deb83753c (diff) | |
download | gdb-a4c97499d90ab83a01d80d4c3df2455a73486e3c.zip gdb-a4c97499d90ab83a01d80d4c3df2455a73486e3c.tar.gz gdb-a4c97499d90ab83a01d80d4c3df2455a73486e3c.tar.bz2 |
Instruction decode generator taken from the PowerPC simulator
and being made more generic.
Diffstat (limited to 'sim/igen/gen-icache.h')
-rw-r--r-- | sim/igen/gen-icache.h | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/sim/igen/gen-icache.h b/sim/igen/gen-icache.h new file mode 100644 index 0000000..c5ba71f --- /dev/null +++ b/sim/igen/gen-icache.h @@ -0,0 +1,68 @@ +/* This file is part of the program psim. + + Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + */ + + + +/* Output code to manipulate the instruction cache: either create it + or reference it */ + +typedef enum { + declare_variables, + define_variables, + undef_variables, +} icache_decl_type; + +typedef enum { + do_not_use_icache = 0, + get_values_from_icache = 0x1, + put_values_in_icache = 0x2, + both_values_and_icache = 0x3, +} icache_body_type; + +extern void print_icache_body +(lf *file, + insn *instruction, + insn_bits *expanded_bits, + cache_table *cache_rules, + icache_decl_type what_to_declare, + icache_body_type what_to_do); + + +/* Output an instruction cache decode function */ + +extern insn_handler print_icache_declaration; +extern insn_handler print_icache_definition; + + +/* Output an instruction cache support function */ + +extern function_handler print_icache_internal_function_declaration; +extern function_handler print_icache_internal_function_definition; + + +/* Output the instruction cache table data structure */ + +extern void print_icache_struct +(insn_table *instructions, + cache_table *cache_rules, + lf *file); + + +/* Output a single instructions decoder */ |