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authorAndrew Cagney <cagney@redhat.com>2002-11-22 04:20:49 +0000
committerAndrew Cagney <cagney@redhat.com>2002-11-22 04:20:49 +0000
commit4e0bf4c4d00096ac436378edaf7718dafec9ff82 (patch)
tree9a80850d7051a761dee6c6dd1aed8df337a1f92c /sim/igen/gen-engine.c
parentfeaee4bdbb06466822e886f5d1d30b9f1e04d985 (diff)
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2002-11-21 Andrew Cagney <ac131313@redhat.com>
* filter.c: Re-indent. * filter.h, filter_host.h, gen-engine.c, gen-engine.h: Ditto. * gen-icache.c, gen-icache.h, gen-idecode.c: Ditto. * gen-idecode.h, gen-itable.c, gen-itable.h: Ditto. * gen-model.c, gen-model.h, gen-semantics.c: Ditto. * gen-semantics.h, gen-support.c, gen-support.h: Ditto. * gen.c, gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto. * ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto. * lf.h, misc.c, misc.h, table.c, table.h: Ditto.
Diffstat (limited to 'sim/igen/gen-engine.c')
-rw-r--r--sim/igen/gen-engine.c244
1 files changed, 103 insertions, 141 deletions
diff --git a/sim/igen/gen-engine.c b/sim/igen/gen-engine.c
index 70ede3d..d0f5c30 100644
--- a/sim/igen/gen-engine.c
+++ b/sim/igen/gen-engine.c
@@ -65,25 +65,25 @@ print_engine_issue_postfix_hook (lf *file)
static void
-print_run_body (lf *file,
- gen_entry *table)
+print_run_body (lf *file, gen_entry *table)
{
/* Output the function to execute real code:
-
+
Unfortunatly, there are multiple cases to consider vis:
-
+
<icache> X <smp>
-
+
Consequently this function is written in multiple different ways */
-
+
lf_printf (file, "{\n");
lf_indent (file, +2);
if (!options.gen.smp)
{
- lf_printf (file, "%sinstruction_address cia;\n", options.module.global.prefix.l);
+ lf_printf (file, "%sinstruction_address cia;\n",
+ options.module.global.prefix.l);
}
lf_printf (file, "int current_cpu = next_cpu_nr;\n");
-
+
if (options.gen.icache)
{
lf_printf (file, "/* flush the icache of a possible break insn */\n");
@@ -93,10 +93,10 @@ print_run_body (lf *file,
lf_printf (file, " cpu_flush_icache (STATE_CPU (sd, cpu_nr));\n");
lf_printf (file, "}\n");
}
-
+
if (!options.gen.smp)
{
-
+
lf_putstr (file, "\
/* CASE 1: NO SMP (with or with out instruction cache).\n\
\n\
@@ -124,16 +124,16 @@ cache. */\n\
lf_putstr (file, "while (1)\n");
lf_putstr (file, " {\n");
lf_indent (file, +4);
-
+
lf_printf (file, "%sinstruction_address nia;\n",
options.module.global.prefix.l);
lf_printf (file, "\n");
if (!options.gen.icache)
{
- lf_printf (file, "%sinstruction_word instruction_0 = IMEM%d (cia);\n",
- options.module.global.prefix.l,
- options.insn_bit_size);
+ lf_printf (file,
+ "%sinstruction_word instruction_0 = IMEM%d (cia);\n",
+ options.module.global.prefix.l, options.insn_bit_size);
print_engine_issue_prefix_hook (file);
print_idecode_body (file, table, "nia = ");
print_engine_issue_postfix_hook (file);
@@ -146,7 +146,8 @@ cache. */\n\
lf_putstr (file, " {\n");
lf_indent (file, -4);
lf_putstr (file, "/* cache hit */\n");
- lf_putstr (file, "idecode_semantic *const semantic = cache_entry->semantic;\n");
+ lf_putstr (file,
+ "idecode_semantic *const semantic = cache_entry->semantic;\n");
lf_putstr (file, "cia = semantic (cpu, cache_entry, cia);\n");
/* tail */
lf_indent (file, -4);
@@ -162,7 +163,8 @@ cache. */\n\
lf_printf (file, "instruction_word instruction = IMEM%d (cia);\n",
options.insn_bit_size);
lf_putstr (file, "if (WITH_MON != 0)\n");
- lf_putstr (file, " mon_event (mon_event_icache_miss, cpu, cia);\n");
+ lf_putstr (file,
+ " mon_event (mon_event_icache_miss, cpu, cia);\n");
if (options.gen.semantic_icache)
{
lf_putstr (file, "{\n");
@@ -183,7 +185,7 @@ cache. */\n\
lf_indent (file, -4);
lf_putstr (file, " }\n");
}
-
+
/* update the cpu if necessary */
switch (options.gen.nia)
{
@@ -210,10 +212,10 @@ cache. */\n\
lf_indent (file, -4);
lf_printf (file, " }\n");
}
-
+
if (options.gen.smp)
{
-
+
lf_putstr (file, "\
/* CASE 2: SMP (With or without ICACHE)\n\
\n\
@@ -223,9 +225,10 @@ cpu1 will normally be the next cpu that is run. Cpu0 being restarted\n\
after all the other CPU's and the event queue have been processed */\n\
\n\
");
-
+
lf_putstr (file, "\n");
- lf_printf (file, "/* have ensured that the event queue is NOT next */\n");
+ lf_printf (file,
+ "/* have ensured that the event queue is NOT next */\n");
lf_printf (file, "SIM_ASSERT (current_cpu >= 0);\n");
lf_printf (file, "SIM_ASSERT (current_cpu <= nr_cpus - 1);\n");
lf_printf (file, "SIM_ASSERT (nr_cpus <= MAX_NR_PROCESSORS);\n");
@@ -247,7 +250,7 @@ after all the other CPU's and the event queue have been processed */\n\
lf_putstr (file, "CIA_SET (cpu, cia);\n");
print_engine_issue_postfix_hook (file);
}
-
+
if (options.gen.icache)
{
lf_putstr (file, "engine_cache *cache_entry =\n");
@@ -258,8 +261,10 @@ after all the other CPU's and the event queue have been processed */\n\
lf_indent (file, +2);
lf_putstr (file, "\n");
lf_putstr (file, "/* cache hit */\n");
- lf_putstr (file, "engine_semantic *semantic = cache_entry->semantic;\n");
- lf_putstr (file, "cia = semantic(processor, cache_entry, cia);\n");
+ lf_putstr (file,
+ "engine_semantic *semantic = cache_entry->semantic;\n");
+ lf_putstr (file,
+ "cia = semantic(processor, cache_entry, cia);\n");
/* tail */
lf_putstr (file, "cpu_set_program_counter(processor, cia);\n");
lf_putstr (file, "\n");
@@ -278,13 +283,14 @@ after all the other CPU's and the event queue have been processed */\n\
lf_printf (file, "instruction_word instruction = IMEM%d (cia);\n",
options.insn_bit_size);
lf_putstr (file, "if (WITH_MON != 0)\n");
- lf_putstr (file, " mon_event(mon_event_icache_miss, processors[current_cpu], cia);\n");
+ lf_putstr (file,
+ " mon_event(mon_event_icache_miss, processors[current_cpu], cia);\n");
if (options.gen.semantic_icache)
{
lf_putstr (file, "{\n");
lf_indent (file, +2);
print_engine_issue_prefix_hook (file);
- print_idecode_body(file, table, "cia =");
+ print_idecode_body (file, table, "cia =");
print_engine_issue_postfix_hook (file);
lf_indent (file, -2);
lf_putstr (file, "}\n");
@@ -292,8 +298,9 @@ after all the other CPU's and the event queue have been processed */\n\
else
{
print_engine_issue_prefix_hook (file);
- print_idecode_body(file, table, "semantic = ");
- lf_putstr (file, "cia = semantic(processor, cache_entry, cia);\n");
+ print_idecode_body (file, table, "semantic = ");
+ lf_putstr (file,
+ "cia = semantic(processor, cache_entry, cia);\n");
print_engine_issue_postfix_hook (file);
}
/* tail */
@@ -303,7 +310,7 @@ after all the other CPU's and the event queue have been processed */\n\
}
lf_putstr (file, "}\n");
}
-
+
lf_putstr (file, "\n");
lf_putstr (file, "current_cpu += 1;\n");
lf_putstr (file, "if (current_cpu == nr_cpus)\n");
@@ -314,13 +321,13 @@ after all the other CPU's and the event queue have been processed */\n\
lf_putstr (file, " }\n");
lf_putstr (file, " current_cpu = 0;\n");
lf_putstr (file, " }\n");
-
+
/* tail */
lf_indent (file, -4);
lf_putstr (file, " }\n");
}
-
-
+
+
lf_indent (file, -2);
lf_putstr (file, "}\n");
}
@@ -330,8 +337,7 @@ after all the other CPU's and the event queue have been processed */\n\
#if 0
static void
-print_jump (lf *file,
- int is_tail)
+print_jump (lf *file, int is_tail)
{
if (!options.gen.smp)
{
@@ -342,7 +348,7 @@ print_jump (lf *file,
lf_putstr (file, " }\n");
lf_putstr (file, "}\n");
}
-
+
if (options.gen.smp)
{
if (is_tail)
@@ -359,7 +365,7 @@ print_jump (lf *file,
lf_putstr (file, "processor = processors[current_cpu];\n");
lf_putstr (file, "nia = cpu_get_program_counter(processor);\n");
}
-
+
if (options.gen.icache)
{
lf_putstr (file, "cache_entry = cpu_icache_entry(processor, nia);\n");
@@ -367,16 +373,17 @@ print_jump (lf *file,
lf_putstr (file, " /* cache hit */\n");
lf_putstr (file, " goto *cache_entry->semantic;\n");
lf_putstr (file, "}\n");
- if (is_tail) {
- lf_putstr (file, "goto cache_miss;\n");
- }
+ if (is_tail)
+ {
+ lf_putstr (file, "goto cache_miss;\n");
+ }
}
-
+
if (!options.gen.icache && is_tail)
{
lf_printf (file, "goto engine;\n");
}
-
+
}
#endif
@@ -384,10 +391,9 @@ print_jump (lf *file,
#if 0
static void
print_jump_insn (lf *file,
- insn_entry *instruction,
+ insn_entry * instruction,
opcode_bits *expanded_bits,
- opcode_field *opcodes,
- cache_entry *cache_rules)
+ opcode_field *opcodes, cache_entry *cache_rules)
{
insn_opcodes opcode_path;
@@ -398,9 +404,8 @@ print_jump_insn (lf *file,
lf_printf (file, "\n");
print_my_defines (file,
instruction->name,
- instruction->format_name,
- expanded_bits);
-
+ instruction->format_name, expanded_bits);
+
/* output the icache entry */
if (options.gen.icache)
{
@@ -409,24 +414,18 @@ print_jump_insn (lf *file,
print_function_name (file,
instruction->name,
instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_icache);
+ NULL, expanded_bits, function_name_prefix_icache);
lf_printf (file, ":\n");
lf_indent (file, +1);
lf_printf (file, "{\n");
lf_indent (file, +2);
lf_putstr (file, "const unsigned_word cia = nia;\n");
- print_itrace (file, instruction, 1/*putting-value-in-cache*/);
+ print_itrace (file, instruction, 1 /*putting-value-in-cache */ );
print_idecode_validate (file, instruction, &opcode_path);
lf_printf (file, "\n");
lf_printf (file, "{\n");
lf_indent (file, +2);
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- 0, /*use_defines*/
+ print_icache_body (file, instruction, expanded_bits, cache_rules, 0, /*use_defines */
put_values_in_icache);
lf_printf (file, "cache_entry->address = nia;\n");
lf_printf (file, "cache_entry->semantic = &&");
@@ -434,16 +433,13 @@ print_jump_insn (lf *file,
instruction->name,
instruction->format_name,
NULL,
- expanded_bits,
- function_name_prefix_semantics);
+ expanded_bits, function_name_prefix_semantics);
lf_printf (file, ";\n");
if (options.gen.semantic_icache)
{
print_semantic_body (file,
- instruction,
- expanded_bits,
- &opcode_path);
- print_jump(file, 1/*is-tail*/);
+ instruction, expanded_bits, &opcode_path);
+ print_jump (file, 1 /*is-tail */ );
}
else
{
@@ -452,8 +448,7 @@ print_jump_insn (lf *file,
instruction->name,
instruction->format_name,
NULL,
- expanded_bits,
- function_name_prefix_semantics);
+ expanded_bits, function_name_prefix_semantics);
lf_printf (file, "; */\n");
}
lf_indent (file, -2);
@@ -461,16 +456,14 @@ print_jump_insn (lf *file,
lf_indent (file, -2);
lf_printf (file, "}\n");
}
-
+
/* print the semantics */
lf_printf (file, "\n");
lf_indent (file, -1);
print_function_name (file,
instruction->name,
instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
+ NULL, expanded_bits, function_name_prefix_semantics);
lf_printf (file, ":\n");
lf_indent (file, +1);
lf_printf (file, "{\n");
@@ -484,12 +477,8 @@ print_jump_insn (lf *file,
? define_variables
: declare_variables),
(options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache));
- print_semantic_body (file,
- instruction,
- expanded_bits,
- &opcode_path);
+ ? get_values_from_icache : do_not_use_icache));
+ print_semantic_body (file, instruction, expanded_bits, &opcode_path);
if (options.gen.direct_access)
print_icache_body (file,
instruction,
@@ -497,9 +486,8 @@ print_jump_insn (lf *file,
cache_rules,
undef_variables,
(options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache));
- print_jump(file, 1/*is tail*/);
+ ? get_values_from_icache : do_not_use_icache));
+ print_jump (file, 1 /*is tail */ );
lf_indent (file, -2);
lf_printf (file, "}\n");
}
@@ -508,18 +496,14 @@ print_jump_insn (lf *file,
#if 0
static void
-print_jump_definition (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
+print_jump_definition (lf *file, gen_entry *entry, int depth, void *data)
{
- cache_entry *cache_rules = (cache_entry*)data;
+ cache_entry *cache_rules = (cache_entry *) data;
if (entry->opcode_rule->with_duplicates)
{
ASSERT (entry->nr_insns == 1
&& entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL);
+ && entry->parent != NULL && entry->parent->opcode != NULL);
ASSERT (entry->nr_insns == 1
&& entry->opcode == NULL
&& entry->parent != NULL
@@ -527,17 +511,11 @@ print_jump_definition (lf *file,
&& entry->parent->opcode_rule != NULL);
print_jump_insn (file,
entry->insns->insn,
- entry->expanded_bits,
- entry->opcode,
- cache_rules);
+ entry->expanded_bits, entry->opcode, cache_rules);
}
- else
+ else
{
- print_jump_insn (file,
- entry->insns->insn,
- NULL,
- NULL,
- cache_rules);
+ print_jump_insn (file, entry->insns->insn, NULL, NULL, cache_rules);
}
}
#endif
@@ -545,9 +523,7 @@ print_jump_definition (lf *file,
#if 0
static void
-print_jump_internal_function (lf *file,
- function_entry *function,
- void *data)
+print_jump_internal_function (lf *file, function_entry * function, void *data)
{
if (function->is_internal)
{
@@ -580,9 +556,7 @@ print_jump_internal_function (lf *file,
#if 0
static void
print_jump_body (lf *file,
- gen_entry *entry,
- insn_table *isa,
- cache_entry *cache_rules)
+ gen_entry *entry, insn_table *isa, cache_entry *cache_rules)
{
lf_printf (file, "{\n");
lf_indent (file, +2);
@@ -599,10 +573,10 @@ print_jump_body (lf *file,
{
lf_putstr (file, "int current_cpu = -1;\n");
}
-
+
/* all the switches and tables - they know about jumping */
print_idecode_lookups (file, entry, cache_rules);
-
+
/* start the simulation up */
if (options.gen.icache)
{
@@ -613,17 +587,17 @@ print_jump_body (lf *file,
lf_putstr (file, " cpu_flush_icache(processors[cpu_nr]);\n");
lf_putstr (file, "}\n");
}
-
+
lf_putstr (file, "\n");
lf_putstr (file, "psim_set_halt_and_restart(system, &halt, &restart);\n");
-
+
lf_putstr (file, "\n");
lf_putstr (file, "if (setjmp(halt))\n");
lf_putstr (file, " return;\n");
-
+
lf_putstr (file, "\n");
lf_putstr (file, "setjmp(restart);\n");
-
+
lf_putstr (file, "\n");
if (!options.gen.smp)
{
@@ -634,7 +608,7 @@ print_jump_body (lf *file,
{
lf_putstr (file, "current_cpu = psim_last_cpu(system);\n");
}
-
+
if (!options.gen.icache)
{
lf_printf (file, "\n");
@@ -642,36 +616,34 @@ print_jump_body (lf *file,
lf_printf (file, "engine:\n");
lf_indent (file, +1);
}
-
- print_jump(file, 0/*is_tail*/);
-
+
+ print_jump (file, 0 /*is_tail */ );
+
if (options.gen.icache)
{
lf_indent (file, -1);
lf_printf (file, "cache_miss:\n");
lf_indent (file, +1);
}
-
- print_engine_issue_prefix_hook (file);
+
+ print_engine_issue_prefix_hook (file);
lf_putstr (file, "instruction\n");
- lf_putstr (file, " = vm_instruction_map_read(cpu_instruction_map(processor),\n");
+ lf_putstr (file,
+ " = vm_instruction_map_read(cpu_instruction_map(processor),\n");
lf_putstr (file, " processor, nia);\n");
print_engine_issue_prefix_hook (file);
print_idecode_body (file, entry, "/*IGORE*/");
print_engine_issue_postfix_hook (file);
-
+
/* print out a table of all the internals functions */
function_entry_traverse (file, isa->functions,
- print_jump_internal_function,
- NULL);
-
+ print_jump_internal_function, NULL);
+
/* print out a table of all the instructions */
ERROR ("Use the list of semantic functions, not travere_tree");
- gen_entry_traverse_tree (file, entry,
- 1,
- NULL, /* start */
- print_jump_definition, /* leaf */
- NULL, /* end */
+ gen_entry_traverse_tree (file, entry, 1, NULL, /* start */
+ print_jump_definition, /* leaf */
+ NULL, /* end */
cache_rules);
lf_indent (file, -2);
lf_printf (file, "}\n");
@@ -701,11 +673,8 @@ print_engine_run_function_header (lf *file,
lf_printf (file, "void (*");
break;
}
- indent = print_function_name (file,
- "run",
- NULL, /* format name */
- processor,
- NULL, /* expanded bits */
+ indent = print_function_name (file, "run", NULL, /* format name */
+ processor, NULL, /* expanded bits */
function_name_prefix_engine);
switch (decl_type)
{
@@ -742,9 +711,7 @@ print_engine_run_function_header (lf *file,
void
gen_engine_h (lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules)
+ gen_table *gen, insn_table *isa, cache_entry *cache_rules)
{
gen_list *entry;
for (entry = gen->tables; entry != NULL; entry = entry->next)
@@ -752,17 +719,14 @@ gen_engine_h (lf *file,
print_engine_run_function_header (file,
(options.gen.multi_sim
? entry->model->name
- : NULL),
- is_function_declaration);
+ : NULL), is_function_declaration);
}
}
void
-gen_engine_c(lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules)
+gen_engine_c (lf *file,
+ gen_table *gen, insn_table *isa, cache_entry *cache_rules)
{
gen_list *entry;
/* the intro */
@@ -781,24 +745,22 @@ gen_engine_c(lf *file,
{
case generate_calls:
print_idecode_lookups (file, entry->table, cache_rules);
-
+
/* output the main engine routine */
print_engine_run_function_header (file,
(options.gen.multi_sim
? entry->model->name
- : NULL),
- is_function_definition);
+ : NULL), is_function_definition);
print_run_body (file, entry->table);
break;
-
+
case generate_jumps:
ERROR ("Jumps currently unimplemented");
#if 0
print_engine_run_function_header (file,
entry->processor,
is_function_definition);
- print_jump_body (file, entry->table,
- isa, cache_rules);
+ print_jump_body (file, entry->table, isa, cache_rules);
#endif
break;
}