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| author | James Bowman <jamesb@excamera.com> | 2017-10-12 18:37:40 -0700 |
|---|---|---|
| committer | James Bowman <jamesb@excamera.com> | 2017-10-12 18:41:29 -0700 |
| commit | 3b4b0a629a972bf80fc0ac6202f89681fab1df37 (patch) | |
| tree | c8cde198a64de3a48b1de08dbf65f68dbbc9a13d /sim/ft32 | |
| parent | d268bbaff7da90caf5fbc94456ae58315ffa1802 (diff) | |
| download | gdb-3b4b0a629a972bf80fc0ac6202f89681fab1df37.zip gdb-3b4b0a629a972bf80fc0ac6202f89681fab1df37.tar.gz gdb-3b4b0a629a972bf80fc0ac6202f89681fab1df37.tar.bz2 | |
FT32: support for FT32B processor - part 1
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.
Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.
bfd/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-ft32.c: Add HOWTO R_FT32_15.
* reloc.c: Add BFD_RELOC_FT32_15.
gas/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
K15.
(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.
include/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* elf/ft32.h: Add R_FT32_15.
* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
(ft32_shortcode, sc_compar, ft32_split_shortcode,
ft32_merge_shortcode, ft32_merge_shortcode): New functions.
opcodes/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
K15. Add jmpix pattern.
sim/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
Diffstat (limited to 'sim/ft32')
| -rw-r--r-- | sim/ft32/interp.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c index b6fedc1..3bc08ee 100644 --- a/sim/ft32/interp.c +++ b/sim/ft32/interp.c @@ -332,7 +332,7 @@ step_once (SIM_DESC sd) uint32_t pa; uint32_t aa; uint32_t k16; - uint32_t k8; + uint32_t k15; uint32_t al; uint32_t r_1v; uint32_t rimmv; @@ -372,7 +372,11 @@ step_once (SIM_DESC sd) pa = (inst >> FT32_FLD_PA_BIT) & LSBS (FT32_FLD_PA_SIZ); aa = (inst >> FT32_FLD_AA_BIT) & LSBS (FT32_FLD_AA_SIZ); k16 = (inst >> FT32_FLD_K16_BIT) & LSBS (FT32_FLD_K16_SIZ); - k8 = nsigned (8, (inst >> FT32_FLD_K8_BIT) & LSBS (FT32_FLD_K8_SIZ)); + k15 = (inst >> FT32_FLD_K15_BIT) & LSBS (FT32_FLD_K15_SIZ); + if (k15 & 0x80) + k15 ^= 0x7f00; + if (k15 & 0x4000) + k15 -= 0x8000; al = (inst >> FT32_FLD_AL_BIT) & LSBS (FT32_FLD_AL_SIZ); r_1v = cpu->state.regs[r_1]; @@ -499,7 +503,7 @@ step_once (SIM_DESC sd) break; case FT32_PAT_LPMI: - cpu->state.regs[r_d] = ft32_read_item (sd, dw, cpu->state.regs[r_1] + k8); + cpu->state.regs[r_d] = ft32_read_item (sd, dw, cpu->state.regs[r_1] + k15); cpu->state.cycles += 1; break; @@ -508,7 +512,7 @@ step_once (SIM_DESC sd) break; case FT32_PAT_STI: - cpu_mem_write (sd, dw, cpu->state.regs[r_d] + k8, cpu->state.regs[r_1]); + cpu_mem_write (sd, dw, cpu->state.regs[r_d] + k15, cpu->state.regs[r_1]); break; case FT32_PAT_LDA: @@ -517,7 +521,7 @@ step_once (SIM_DESC sd) break; case FT32_PAT_LDI: - cpu->state.regs[r_d] = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k8); + cpu->state.regs[r_d] = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k15); cpu->state.cycles += 1; break; @@ -534,8 +538,8 @@ step_once (SIM_DESC sd) case FT32_PAT_EXI: { uint32_t tmp; - tmp = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k8); - cpu_mem_write (sd, dw, cpu->state.regs[r_1] + k8, cpu->state.regs[r_d]); + tmp = cpu_mem_read (sd, dw, cpu->state.regs[r_1] + k15); + cpu_mem_write (sd, dw, cpu->state.regs[r_1] + k15, cpu->state.regs[r_d]); cpu->state.regs[r_d] = tmp; cpu->state.cycles += 1; } |