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author | James Bowman <james.bowman@ftdichip.com> | 2015-03-23 19:20:59 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2015-03-28 02:12:33 -0400 |
commit | f46e4eb78ba55e8bf8dedd98d7fe354729181710 (patch) | |
tree | 51139a283ac4c3a5250a0665cf8d2323709fc9b9 /sim/ft32/sim-main.h | |
parent | 113d38f929631fa14da98731eebfe97a44d035ce (diff) | |
download | gdb-f46e4eb78ba55e8bf8dedd98d7fe354729181710.zip gdb-f46e4eb78ba55e8bf8dedd98d7fe354729181710.tar.gz gdb-f46e4eb78ba55e8bf8dedd98d7fe354729181710.tar.bz2 |
sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
Diffstat (limited to 'sim/ft32/sim-main.h')
-rw-r--r-- | sim/ft32/sim-main.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/sim/ft32/sim-main.h b/sim/ft32/sim-main.h new file mode 100644 index 0000000..6cb7c7e --- /dev/null +++ b/sim/ft32/sim-main.h @@ -0,0 +1,58 @@ +/* Simulator for FTDI FT32 processor. + + Copyright (C) 2009-2015 Free Software Foundation, Inc. + Contributed by FTDI <support@ftdichip.com> + + This file is part of simulators. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#ifndef SIM_MAIN_H +#define SIM_MAIN_H + +#include "sim-basics.h" + +typedef address_word sim_cia; + +#include "sim-base.h" +#include "bfd.h" + +typedef struct _sim_cpu SIM_CPU; + +#include "ft32-sim.h" + +struct _sim_cpu { + + /* The following are internal simulator state variables: */ +#define CIA_GET(CPU) ((CPU)->state.pc + 0) +#define CIA_SET(CPU,CIA) ((CPU)->state.pc = (CIA)) + + struct ft32_cpu_state state; + + sim_cpu_base base; +}; + +struct sim_state { + + sim_cpu *cpu[MAX_NR_PROCESSORS]; +#if (WITH_SMP) +#define STATE_CPU(sd,n) ((sd)->cpu[n]) +#else +#define STATE_CPU(sd,n) ((sd)->cpu[0]) +#endif + + sim_state_base base; +}; + +#endif |