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author | Dave Brolley <brolley@redhat.com> | 2003-08-29 16:35:47 +0000 |
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committer | Dave Brolley <brolley@redhat.com> | 2003-08-29 16:35:47 +0000 |
commit | b34f6357d032f4b39f9c7adb1995956d04339461 (patch) | |
tree | a77b3c9a47df5e56dc9fc85d3a2792b12cb436e8 /sim/frv/registers.h | |
parent | 60fac5b81a94dedf1997344af7a998e9ea611e55 (diff) | |
download | gdb-b34f6357d032f4b39f9c7adb1995956d04339461.zip gdb-b34f6357d032f4b39f9c7adb1995956d04339461.tar.gz gdb-b34f6357d032f4b39f9c7adb1995956d04339461.tar.bz2 |
New simulator for Fujitsu frv contributed by Red Hat.
Diffstat (limited to 'sim/frv/registers.h')
-rw-r--r-- | sim/frv/registers.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/sim/frv/registers.h b/sim/frv/registers.h new file mode 100644 index 0000000..dba4d96 --- /dev/null +++ b/sim/frv/registers.h @@ -0,0 +1,59 @@ +/* Register definitions for the FRV simulator + Copyright (C) 2000 Free Software Foundation, Inc. + Contributed by Red Hat. + +This file is part of the GNU Simulators. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef REGISTERS_H +#define REGISTERS_H + +#define FRV_MAX_GR 64 +#define FRV_MAX_FR 64 +#define FRV_MAX_CPR 64 +#define FRV_MAX_SPR 4096 + +/* Register init, reset values and read_only masks. */ +typedef struct +{ + USI init_value; /* initial value */ + USI reset_value; /* value for software reset */ + USI reset_mask; /* bits which are reset */ + USI read_only_mask; /* bits which are read-only */ + char implemented; /* 1==register is implemented */ + char supervisor; /* 1==register is supervisor-only */ +} FRV_SPR_CONTROL_INFO; + +typedef struct +{ + int fr; /* FR registers implemented */ + int cpr; /* coprocessor registers implemented */ + FRV_SPR_CONTROL_INFO *spr; /* SPR implementation details */ +} FRV_REGISTER_CONTROL; + +void frv_register_control_init (SIM_CPU *); +void frv_initialize_spr (SIM_CPU *); +void frv_reset_spr (SIM_CPU *); + +void frv_check_spr_access (SIM_CPU *, UINT); + +void frv_fr_registers_available (SIM_CPU *, int *, int *); +void frv_gr_registers_available (SIM_CPU *, int *, int *); +int frv_check_register_access (SIM_CPU *, SI, int, int); +int frv_check_gr_access (SIM_CPU *, SI); +int frv_check_fr_access (SIM_CPU *, SI); + +#endif /* REGISTERS_H */ |