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author | Richard Sandiford <rdsandiford@googlemail.com> | 2004-03-01 10:11:46 +0000 |
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committer | Richard Sandiford <rdsandiford@googlemail.com> | 2004-03-01 10:11:46 +0000 |
commit | 676a64f422161303f6d57fca0d244400a1cdd576 (patch) | |
tree | 74fd90096f8ea65f34c066fd541c4c7ff7da07e9 /sim/frv/profile.c | |
parent | c7a48b9ac9215f67421a769c2986b6eb2a69780b (diff) | |
download | gdb-676a64f422161303f6d57fca0d244400a1cdd576.zip gdb-676a64f422161303f6d57fca0d244400a1cdd576.tar.gz gdb-676a64f422161303f6d57fca0d244400a1cdd576.tar.bz2 |
Add fr450 support.
Diffstat (limited to 'sim/frv/profile.c')
-rw-r--r-- | sim/frv/profile.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/sim/frv/profile.c b/sim/frv/profile.c index 3a3d1aa..577826f 100644 --- a/sim/frv/profile.c +++ b/sim/frv/profile.c @@ -37,7 +37,8 @@ static void reset_gr_flags (SIM_CPU *cpu, INT gr) { SIM_DESC sd = CPU_STATE (cpu); - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400) + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400 + || STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr450) fr400_reset_gr_flags (cpu, gr); /* Other machines have no gr flags right now. */ } @@ -46,7 +47,8 @@ static void reset_fr_flags (SIM_CPU *cpu, INT fr) { SIM_DESC sd = CPU_STATE (cpu); - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400) + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400 + || STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr450) fr400_reset_fr_flags (cpu, fr); else if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr500) fr500_reset_fr_flags (cpu, fr); @@ -56,7 +58,8 @@ static void reset_acc_flags (SIM_CPU *cpu, INT acc) { SIM_DESC sd = CPU_STATE (cpu); - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400) + if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400 + || STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr450) fr400_reset_acc_flags (cpu, acc); /* Other machines have no acc flags right now. */ } @@ -926,6 +929,7 @@ frvbf_model_insn_before (SIM_CPU *cpu, int first_p) switch (STATE_ARCHITECTURE (sd)->mach) { case bfd_mach_fr400: + case bfd_mach_fr450: fr400_model_insn_before (cpu, first_p); break; case bfd_mach_fr500: @@ -992,6 +996,7 @@ frvbf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) switch (STATE_ARCHITECTURE (sd)->mach) { case bfd_mach_fr400: + case bfd_mach_fr450: fr400_model_insn_after (cpu, last_p, cycles); break; case bfd_mach_fr500: |