2003-09-24 Dave Brolley <brolley@redhat.com>

        * profile.h (update_FR_ptime): New prototype.
        (update_FRdouble_ptime): Ditto.
        (update_SPR_ptime): Ditto.
        (increase_ACC_busy): Ditto.
        (enforce_full_acc_latency): Ditto.
        (post_wait_for_SPR): Ditto.
        * profile.c (update_FR_ptime): Moved here from profile-fr500.c.
        (update_FRdouble_ptime): Ditto.
        (update_SPR_ptime): New function.
        (increase_ACC_busy): Ditto.
        (enforce_full_acc_latency): Ditto.
        (vliw_wait_for_fdiv_resource): Correct resource name.
        (vliw_wait_for_fsqrt_resource): Ditto.
        (post_wait_for_SPR): New function.
        * profile-fr500.c (frvbf_model_fr500_u_commit): New function.
        (frvbf_model_fr500_u_gr2fr): Pass out_FRk as output register to
        adjust_float_register_busy.
        (frvbf_model_fr500_u_gr_load): Record latency of SPR registers.
        (frvbf_model_fr500_u_fr_load): Wait for and record latency of SPR
        registers.
        (frvbf_model_fr500_u_float_arith): Ditto.
        (frvbf_model_fr500_u_float_dual_arith): Ditto.
        (frvbf_model_fr500_u_float_div): Ditto.
        (frvbf_model_fr500_u_float_sqrt): Ditto.
        (frvbf_model_fr500_u_float_convert): Ditto.
        (update_FR_ptime): Moved to profile.c
        (update_FRdouble_ptime): Moved to profile.c
        * profile-fr400.c (update_FR_ptime): Removed. Identical to functions
        for other machines.
        (update_FRdouble_ptime): Ditto.
        * arch.h,cpu.h,sem.c,decode.[ch],model.c,sem.c: Regenerated.

1 files changed, 0 insertions, 49 deletions

diff --git a/sim/frv/profile-fr400.c b/sim/frv/profile-fr400.c
index 9baddd1..698e06e 100644
--- a/sim/frv/profile-fr400.c
+++ b/sim/frv/profile-fr400.c
@@ -621,55 +621,6 @@ frvbf_model_fr400_u_gr2spr (SIM_CPU *cpu, const IDESC *idesc,
 				     in_GRj, out_spr);
 }
 
-/* Top up the post-processing time of the given FR by the given number of
-   cycles.  */
-static void
-update_FR_ptime (SIM_CPU *cpu, INT out_FR, int cycles)
-{
-  if (out_FR >= 0)
-    {
-      FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu);
-      /* If a load is pending on this register, then add the cycles to
-	 the post processing time for this register. Otherwise apply it
-	 directly to the latency of the register.  */
-      if (! load_pending_for_register (cpu, out_FR, 1, REGTYPE_FR))
-	{
-	  int *fr = ps->fr_latency;
-	  fr[out_FR] += cycles;
-	}
-      else
-	ps->fr_ptime[out_FR] += cycles;
-    }
-}
-
-static void
-update_FRdouble_ptime (SIM_CPU *cpu, INT out_FR, int cycles)
-{
-  if (out_FR >= 0)
-    {
-      FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu);
-      /* If a load is pending on this register, then add the cycles to
-	 the post processing time for this register. Otherwise apply it
-	 directly to the latency of the register.  */
-      if (! load_pending_for_register (cpu, out_FR, 2, REGTYPE_FR))
-	{
-	  int *fr = ps->fr_latency;
-	  fr[out_FR] += cycles;
-	  if (out_FR < 63)
-	    fr[out_FR + 1] += cycles;
-	}
-      else
-	{
-	  /* On the fr400, loads are available to media insns one cycle early,
-	     so knock one cycle off the post processing time to account for
-	     this.  */
-	  ps->fr_ptime[out_FR] += cycles - 1;
-	  if (out_FR < 63)
-	    ps->fr_ptime[out_FR + 1] += cycles - 1;
-	}
-    }
-}
-
 int
 frvbf_model_fr400_u_media_1 (SIM_CPU *cpu, const IDESC *idesc,
 			     int unit_num, int referenced,