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authorRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 09:42:33 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 09:42:33 +0000
commitc7a48b9ac9215f67421a769c2986b6eb2a69780b (patch)
tree7b7c194a858c08b0cbf6bff28a4689eda00f46a3 /sim/frv/memory.c
parent8b73069fed6ec6b73e35eccdf186887d89ecb84b (diff)
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cpu/
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. (scutss): Change unit to I0. (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. (mqsaths): Fix FR400-MAJOR categorization. (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) combinations. opcodes/ * frv-desc.c, frv-opc.c: Regenerate. sim/frv/ * cache.c (frv_cache_init): Change fr400 cache statistics to match the fr405. (non_cache_access): Add missing breaks. * interrupts.c (set_exception_status_registers): Always set EAR15 for data_access_errors. * memory.c (fr400_check_write_address): Remove redundant alignment check. * model.c: Regenerate.
Diffstat (limited to 'sim/frv/memory.c')
-rw-r--r--sim/frv/memory.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/sim/frv/memory.c b/sim/frv/memory.c
index 4dbc652..adee4c1 100644
--- a/sim/frv/memory.c
+++ b/sim/frv/memory.c
@@ -679,18 +679,6 @@ frvbf_read_imem_USI (SIM_CPU *current_cpu, PCADDR vpc)
static SI
fr400_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask)
{
- if (address & align_mask)
- {
- /* On the fr400, this causes a data_access_error. */
- /* Make sure that this exception is not masked. */
- USI isr = GET_ISR ();
- if (! GET_ISR_EMAM (isr))
- {
- /* Bad alignment causes a data_access_error on fr400. */
- frv_queue_data_access_error_interrupt (current_cpu, address);
- }
- address &= ~align_mask;
- }
if (align_mask == 7
&& address >= 0xfe800000 && address <= 0xfeffffff)
frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR);