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author | Doug Evans <dje@google.com> | 2009-11-23 04:12:17 +0000 |
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committer | Doug Evans <dje@google.com> | 2009-11-23 04:12:17 +0000 |
commit | 197fa1aa2ca7f943805196c37031b44f7b87d5a7 (patch) | |
tree | 2094056b2e6e8bf0319e70b89af8c9c4b2be2b5a /sim/frv/cpu.h | |
parent | 1fbb9298a46e1bf9eca8fe24027102cf2fcf01fc (diff) | |
download | gdb-197fa1aa2ca7f943805196c37031b44f7b87d5a7.zip gdb-197fa1aa2ca7f943805196c37031b44f7b87d5a7.tar.gz gdb-197fa1aa2ca7f943805196c37031b44f7b87d5a7.tar.bz2 |
* cgen-engine.h (EXTRACT_MSB0_LGSINT, EXTRACT_MSB0_LGUINT): Define.
(EXTRACT_LSB0_LGSINT, EXTRACT_LSB0_LGUINT): Define.
(EXTRACT_FN, SEMANTIC_FN): Use CGEN_INSN_WORD in prototype
instead of CGEN_INSN_INT.
plus, cgen files: Regenerate.
Diffstat (limited to 'sim/frv/cpu.h')
-rw-r--r-- | sim/frv/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sim/frv/cpu.h b/sim/frv/cpu.h index d54a996..17552d1 100644 --- a/sim/frv/cpu.h +++ b/sim/frv/cpu.h @@ -32,6 +32,12 @@ This file is part of the GNU simulators. /* Maximum number of instructions that can be executed in parallel. */ #define MAX_PARALLEL_INSNS 8 +/* The size of an "int" needed to hold an instruction word. + This is usually 32 bits, but some architectures needs 64 bits. */ +typedef CGEN_INSN_INT CGEN_INSN_WORD; + +#include "cgen-engine.h" + /* CPU state information. */ typedef struct { /* Hardware elements. */ |