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authorDave Brolley <brolley@redhat.com>2003-09-24 19:05:39 +0000
committerDave Brolley <brolley@redhat.com>2003-09-24 19:05:39 +0000
commit1c453cd621376a909aa0035c01f9c22d782be7fc (patch)
treea915b204d9f28fb5f7ad4d8621b8e00c2649764f /sim/frv/cpu.h
parentd03124067c162553fb099983d2a6c9bf6e247284 (diff)
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2003-09-24 Dave Brolley <brolley@redhat.com>
* profile.h (update_FR_ptime): New prototype. (update_FRdouble_ptime): Ditto. (update_SPR_ptime): Ditto. (increase_ACC_busy): Ditto. (enforce_full_acc_latency): Ditto. (post_wait_for_SPR): Ditto. * profile.c (update_FR_ptime): Moved here from profile-fr500.c. (update_FRdouble_ptime): Ditto. (update_SPR_ptime): New function. (increase_ACC_busy): Ditto. (enforce_full_acc_latency): Ditto. (vliw_wait_for_fdiv_resource): Correct resource name. (vliw_wait_for_fsqrt_resource): Ditto. (post_wait_for_SPR): New function. * profile-fr500.c (frvbf_model_fr500_u_commit): New function. (frvbf_model_fr500_u_gr2fr): Pass out_FRk as output register to adjust_float_register_busy. (frvbf_model_fr500_u_gr_load): Record latency of SPR registers. (frvbf_model_fr500_u_fr_load): Wait for and record latency of SPR registers. (frvbf_model_fr500_u_float_arith): Ditto. (frvbf_model_fr500_u_float_dual_arith): Ditto. (frvbf_model_fr500_u_float_div): Ditto. (frvbf_model_fr500_u_float_sqrt): Ditto. (frvbf_model_fr500_u_float_convert): Ditto. (update_FR_ptime): Moved to profile.c (update_FRdouble_ptime): Moved to profile.c * profile-fr400.c (update_FR_ptime): Removed. Identical to functions for other machines. (update_FRdouble_ptime): Ditto. * arch.h,cpu.h,sem.c,decode.[ch],model.c,sem.c: Regenerated.
Diffstat (limited to 'sim/frv/cpu.h')
-rw-r--r--sim/frv/cpu.h15
1 files changed, 8 insertions, 7 deletions
diff --git a/sim/frv/cpu.h b/sim/frv/cpu.h
index d2328fd..1b0a4fd 100644
--- a/sim/frv/cpu.h
+++ b/sim/frv/cpu.h
@@ -140,7 +140,7 @@ frvbf_h_spr_set_handler (current_cpu, (index), (x));\
UQI h_iccr[4];
#define GET_H_ICCR(a1) CPU (h_iccr)[a1]
#define SET_H_ICCR(a1, x) (CPU (h_iccr)[a1] = (x))
- /* Integer condition code registers */
+ /* Floating point condition code registers */
UQI h_fccr[4];
#define GET_H_FCCR(a1) CPU (h_fccr)[a1]
#define SET_H_FCCR(a1, x) (CPU (h_fccr)[a1] = (x))
@@ -419,12 +419,6 @@ union sem_fields {
unsigned char out_GRklo;
} sfmt_setlo;
struct { /* */
- UINT f_ACCGk;
- UINT f_FRi;
- unsigned char in_FRinti;
- unsigned char out_ACCGk;
- } sfmt_mwtaccg;
- struct { /* */
UINT f_ACCGi;
UINT f_FRk;
unsigned char in_ACCGi;
@@ -485,6 +479,13 @@ union sem_fields {
unsigned char in_GRj;
} sfmt_movgs;
struct { /* */
+ UINT f_ACCGk;
+ UINT f_FRi;
+ unsigned char in_ACCGk;
+ unsigned char in_FRinti;
+ unsigned char out_ACCGk;
+ } sfmt_mwtaccg;
+ struct { /* */
INT f_s6;
UINT f_ACC40Si;
UINT f_FRk;