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authorRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 10:11:46 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 10:11:46 +0000
commit676a64f422161303f6d57fca0d244400a1cdd576 (patch)
tree74fd90096f8ea65f34c066fd541c4c7ff7da07e9 /sim/frv/cache.c
parentc7a48b9ac9215f67421a769c2986b6eb2a69780b (diff)
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Add fr450 support.
Diffstat (limited to 'sim/frv/cache.c')
-rw-r--r--sim/frv/cache.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/frv/cache.c b/sim/frv/cache.c
index 578a011..0605682 100644
--- a/sim/frv/cache.c
+++ b/sim/frv/cache.c
@@ -38,6 +38,7 @@ frv_cache_init (SIM_CPU *cpu, FRV_CACHE *cache)
switch (STATE_ARCHITECTURE (sd)->mach)
{
case bfd_mach_fr400:
+ case bfd_mach_fr450:
if (cache->configured_sets == 0)
cache->configured_sets = 512;
if (cache->configured_ways == 0)
@@ -205,6 +206,7 @@ non_cache_access (FRV_CACHE *cache, USI address)
switch (STATE_ARCHITECTURE (sd)->mach)
{
case bfd_mach_fr400:
+ case bfd_mach_fr450:
if (address >= 0xff000000
|| address >= 0xfe000000 && address <= 0xfeffffff)
return 1; /* non-cache access */