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authorRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 09:42:33 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 09:42:33 +0000
commitc7a48b9ac9215f67421a769c2986b6eb2a69780b (patch)
tree7b7c194a858c08b0cbf6bff28a4689eda00f46a3 /sim/frv/ChangeLog
parent8b73069fed6ec6b73e35eccdf186887d89ecb84b (diff)
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cpu/
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. (scutss): Change unit to I0. (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. (mqsaths): Fix FR400-MAJOR categorization. (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) combinations. opcodes/ * frv-desc.c, frv-opc.c: Regenerate. sim/frv/ * cache.c (frv_cache_init): Change fr400 cache statistics to match the fr405. (non_cache_access): Add missing breaks. * interrupts.c (set_exception_status_registers): Always set EAR15 for data_access_errors. * memory.c (fr400_check_write_address): Remove redundant alignment check. * model.c: Regenerate.
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diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog
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--- a/sim/frv/ChangeLog
+++ b/sim/frv/ChangeLog
@@ -1,5 +1,16 @@
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
+ * cache.c (frv_cache_init): Change fr400 cache statistics to match
+ the fr405.
+ (non_cache_access): Add missing breaks.
+ * interrupts.c (set_exception_status_registers): Always set EAR15
+ for data_access_errors.
+ * memory.c (fr400_check_write_address): Remove redundant alignment
+ check.
+ * model.c: Regenerate.
+
+2004-03-01 Richard Sandiford <rsandifo@redhat.com>
+
* frv.c (frvbf_iacc_cut): Rework, taking rounding into account.
2004-03-01 Richard Sandiford <rsandifo@redhat.com>