import gdb-1999-08-09 snapshot

8 files changed, 1855 insertions, 2182 deletions

diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog
index 16ad6d4..7b39970 100644
--- a/sim/fr30/ChangeLog
+++ b/sim/fr30/ChangeLog
@@ -1,3 +1,11 @@
+1999-08-09  Doug Evans  <devans@casey.cygnus.com>
+
+	* cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
+
+1999-08-04  Doug Evans  <devans@casey.cygnus.com>
+
+	* cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
+
 1999-07-06  Doug Evans  <devans@casey.cygnus.com>
 
 	* cpu.h,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
diff --git a/sim/fr30/cpu.h b/sim/fr30/cpu.h
index fa07884..27745da1 100644
--- a/sim/fr30/cpu.h
+++ b/sim/fr30/cpu.h
@@ -189,536 +189,227 @@ typedef struct {
   UINT load_regs_pending;
 } MODEL_FR30_1_DATA;
 
+/* Instruction argument buffer.  */
+
 union sem_fields {
-    struct { /* empty sformat for unspecified field list */
-      int empty;
-    } fmt_empty;
-    struct { /* e.g. add $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_add;
-    struct { /* e.g. add $u4,$Ri */
-      UINT f_u4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_addi;
-    struct { /* e.g. add2 $m4,$Ri */
-      SI f_m4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_add2;
-    struct { /* e.g. addc $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_addc;
-    struct { /* e.g. addn $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_addn;
-    struct { /* e.g. addn $u4,$Ri */
-      UINT f_u4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_addni;
-    struct { /* e.g. addn2 $m4,$Ri */
-      SI f_m4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_addn2;
-    struct { /* e.g. cmp $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_cmp;
-    struct { /* e.g. cmp $u4,$Ri */
-      UINT f_u4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_cmpi;
-    struct { /* e.g. cmp2 $m4,$Ri */
-      SI f_m4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_cmp2;
-    struct { /* e.g. and $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_and;
-    struct { /* e.g. and $Rj,@$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_andm;
-    struct { /* e.g. andh $Rj,@$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_andh;
-    struct { /* e.g. andb $Rj,@$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_andb;
-    struct { /* e.g. bandl $u4,@$Ri */
-      UINT f_u4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_bandl;
-    struct { /* e.g. btstl $u4,@$Ri */
-      UINT f_u4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_btstl;
-    struct { /* e.g. mul $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_mul;
-    struct { /* e.g. mulu $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_mulu;
-    struct { /* e.g. mulh $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_mulh;
-    struct { /* e.g. div0s $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_div0s;
-    struct { /* e.g. div0u $Ri */
-      int empty;
-    } fmt_div0u;
-    struct { /* e.g. div1 $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_div1;
-    struct { /* e.g. div2 $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_div2;
-    struct { /* e.g. div3 */
-      int empty;
-    } fmt_div3;
-    struct { /* e.g. div4s */
-      int empty;
-    } fmt_div4s;
-    struct { /* e.g. lsl $Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_lsl;
-    struct { /* e.g. lsl $u4,$Ri */
-      UINT f_u4;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_lsli;
-    struct { /* e.g. ldi:8 $i8,$Ri */
-      UINT f_i8;
-      SI * i_Ri;
-      unsigned char out_Ri;
-    } fmt_ldi8;
-    struct { /* e.g. ldi:20 $i20,$Ri */
-      UINT f_i20;
-      SI * i_Ri;
-      unsigned char out_Ri;
-    } fmt_ldi20;
-    struct { /* e.g. ldi:32 $i32,$Ri */
-      UINT f_i32;
-      SI * i_Ri;
-      unsigned char out_Ri;
-    } fmt_ldi32;
-    struct { /* e.g. ld @$Rj,$Ri */
-      SI * i_Rj;
-      SI * i_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_ld;
-    struct { /* e.g. ld @($R13,$Rj),$Ri */
-      SI * i_Rj;
-      SI * i_Ri;
-      unsigned char in_Rj;
-      unsigned char in_h_gr_13;
-      unsigned char out_Ri;
-    } fmt_ldr13;
-    struct { /* e.g. ld @($R14,$disp10),$Ri */
-      SI f_disp10;
-      SI * i_Ri;
-      unsigned char in_h_gr_14;
-      unsigned char out_Ri;
-    } fmt_ldr14;
-    struct { /* e.g. lduh @($R14,$disp9),$Ri */
-      SI f_disp9;
-      SI * i_Ri;
-      unsigned char in_h_gr_14;
-      unsigned char out_Ri;
-    } fmt_ldr14uh;
-    struct { /* e.g. ldub @($R14,$disp8),$Ri */
-      INT f_disp8;
-      SI * i_Ri;
-      unsigned char in_h_gr_14;
-      unsigned char out_Ri;
-    } fmt_ldr14ub;
-    struct { /* e.g. ld @($R15,$udisp6),$Ri */
-      USI f_udisp6;
-      SI * i_Ri;
-      unsigned char in_h_gr_15;
-      unsigned char out_Ri;
-    } fmt_ldr15;
-    struct { /* e.g. ld @$R15+,$Ri */
-      UINT f_Ri;
-      SI * i_Ri;
-      unsigned char in_h_gr_15;
-      unsigned char out_Ri;
-      unsigned char out_h_gr_15;
-    } fmt_ldr15gr;
-    struct { /* e.g. ld @$R15+,$Rs2 */
-      UINT f_Rs2;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_ldr15dr;
-    struct { /* e.g. ld @$R15+,$ps */
-      int empty;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_ldr15ps;
-    struct { /* e.g. st $Ri,@$Rj */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-    } fmt_st;
-    struct { /* e.g. st $Ri,@($R13,$Rj) */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char in_h_gr_13;
-    } fmt_str13;
-    struct { /* e.g. st $Ri,@($R14,$disp10) */
-      SI f_disp10;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char in_h_gr_14;
-    } fmt_str14;
-    struct { /* e.g. sth $Ri,@($R14,$disp9) */
-      SI f_disp9;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char in_h_gr_14;
-    } fmt_str14h;
-    struct { /* e.g. stb $Ri,@($R14,$disp8) */
-      INT f_disp8;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char in_h_gr_14;
-    } fmt_str14b;
-    struct { /* e.g. st $Ri,@($R15,$udisp6) */
-      USI f_udisp6;
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char in_h_gr_15;
-    } fmt_str15;
-    struct { /* e.g. st $Ri,@-$R15 */
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_str15gr;
-    struct { /* e.g. st $Rs2,@-$R15 */
-      UINT f_Rs2;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_str15dr;
-    struct { /* e.g. st $ps,@-$R15 */
-      int empty;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_str15ps;
-    struct { /* e.g. mov $Rj,$Ri */
-      SI * i_Rj;
-      SI * i_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_mov;
-    struct { /* e.g. mov $Rs1,$Ri */
-      UINT f_Rs1;
-      SI * i_Ri;
-      unsigned char out_Ri;
-    } fmt_movdr;
-    struct { /* e.g. mov $ps,$Ri */
-      SI * i_Ri;
-      unsigned char out_Ri;
-    } fmt_movps;
-    struct { /* e.g. mov $Ri,$Rs1 */
-      UINT f_Rs1;
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_mov2dr;
-    struct { /* e.g. mov $Ri,$ps */
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_mov2ps;
-    struct { /* e.g. bno:d $label9 */
-      int empty;
-    } fmt_bnod;
-    struct { /* e.g. dmov $R13,@$dir10 */
-      USI f_dir10;
-      unsigned char in_h_gr_13;
-    } fmt_dmovr13;
-    struct { /* e.g. dmovh $R13,@$dir9 */
-      USI f_dir9;
-      unsigned char in_h_gr_13;
-    } fmt_dmovr13h;
-    struct { /* e.g. dmovb $R13,@$dir8 */
-      UINT f_dir8;
-      unsigned char in_h_gr_13;
-    } fmt_dmovr13b;
-    struct { /* e.g. dmov @$R13+,@$dir10 */
-      USI f_dir10;
-      unsigned char in_h_gr_13;
-      unsigned char out_h_gr_13;
-    } fmt_dmovr13pi;
-    struct { /* e.g. dmovh @$R13+,@$dir9 */
-      USI f_dir9;
-      unsigned char in_h_gr_13;
-      unsigned char out_h_gr_13;
-    } fmt_dmovr13pih;
-    struct { /* e.g. dmovb @$R13+,@$dir8 */
-      UINT f_dir8;
-      unsigned char in_h_gr_13;
-      unsigned char out_h_gr_13;
-    } fmt_dmovr13pib;
-    struct { /* e.g. dmov @$R15+,@$dir10 */
-      USI f_dir10;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_dmovr15pi;
-    struct { /* e.g. dmov @$dir10,$R13 */
-      USI f_dir10;
-      unsigned char out_h_gr_13;
-    } fmt_dmov2r13;
-    struct { /* e.g. dmovh @$dir9,$R13 */
-      USI f_dir9;
-      unsigned char out_h_gr_13;
-    } fmt_dmov2r13h;
-    struct { /* e.g. dmovb @$dir8,$R13 */
-      UINT f_dir8;
-      unsigned char out_h_gr_13;
-    } fmt_dmov2r13b;
-    struct { /* e.g. dmov @$dir10,@$R13+ */
-      USI f_dir10;
-      unsigned char in_h_gr_13;
-      unsigned char out_h_gr_13;
-    } fmt_dmov2r13pi;
-    struct { /* e.g. dmovh @$dir9,@$R13+ */
-      USI f_dir9;
-      unsigned char in_h_gr_13;
-      unsigned char out_h_gr_13;
-    } fmt_dmov2r13pih;
-    struct { /* e.g. dmovb @$dir8,@$R13+ */
-      UINT f_dir8;
-      unsigned char in_h_gr_13;
-      unsigned char out_h_gr_13;
-    } fmt_dmov2r13pib;
-    struct { /* e.g. dmov @$dir10,@-$R15 */
-      USI f_dir10;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_dmov2r15pd;
-    struct { /* e.g. ldres @$Ri+,$u4 */
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_ldres;
-    struct { /* e.g. copop $u4c,$ccc,$CRj,$CRi */
-      int empty;
-    } fmt_copop;
-    struct { /* e.g. andccr $u8 */
-      UINT f_u8;
-    } fmt_andccr;
-    struct { /* e.g. stilm $u8 */
-      UINT f_u8;
-    } fmt_stilm;
-    struct { /* e.g. addsp $s10 */
-      SI f_s10;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_15;
-    } fmt_addsp;
-    struct { /* e.g. extsb $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_extsb;
-    struct { /* e.g. extub $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_extub;
-    struct { /* e.g. extsh $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_extsh;
-    struct { /* e.g. extuh $Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-      unsigned char out_Ri;
-    } fmt_extuh;
-    struct { /* e.g. ldm0 ($reglist_low_ld) */
-      UINT f_reglist_low_ld;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_0;
-      unsigned char out_h_gr_1;
-      unsigned char out_h_gr_15;
-      unsigned char out_h_gr_2;
-      unsigned char out_h_gr_3;
-      unsigned char out_h_gr_4;
-      unsigned char out_h_gr_5;
-      unsigned char out_h_gr_6;
-      unsigned char out_h_gr_7;
-    } fmt_ldm0;
-    struct { /* e.g. ldm1 ($reglist_hi_ld) */
-      UINT f_reglist_hi_ld;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_10;
-      unsigned char out_h_gr_11;
-      unsigned char out_h_gr_12;
-      unsigned char out_h_gr_13;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-      unsigned char out_h_gr_8;
-      unsigned char out_h_gr_9;
-    } fmt_ldm1;
-    struct { /* e.g. stm0 ($reglist_low_st) */
-      UINT f_reglist_low_st;
-      unsigned char in_h_gr_0;
-      unsigned char in_h_gr_1;
-      unsigned char in_h_gr_15;
-      unsigned char in_h_gr_2;
-      unsigned char in_h_gr_3;
-      unsigned char in_h_gr_4;
-      unsigned char in_h_gr_5;
-      unsigned char in_h_gr_6;
-      unsigned char in_h_gr_7;
-      unsigned char out_h_gr_15;
-    } fmt_stm0;
-    struct { /* e.g. stm1 ($reglist_hi_st) */
-      UINT f_reglist_hi_st;
-      unsigned char in_h_gr_10;
-      unsigned char in_h_gr_11;
-      unsigned char in_h_gr_12;
-      unsigned char in_h_gr_13;
-      unsigned char in_h_gr_14;
-      unsigned char in_h_gr_15;
-      unsigned char in_h_gr_8;
-      unsigned char in_h_gr_9;
-      unsigned char out_h_gr_15;
-    } fmt_stm1;
-    struct { /* e.g. enter $u10 */
-      USI f_u10;
-      unsigned char in_h_gr_14;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-    } fmt_enter;
-    struct { /* e.g. leave */
-      int empty;
-      unsigned char in_h_gr_14;
-      unsigned char in_h_gr_15;
-      unsigned char out_h_gr_14;
-      unsigned char out_h_gr_15;
-    } fmt_leave;
-    struct { /* e.g. xchb @$Rj,$Ri */
-      SI * i_Ri;
-      SI * i_Rj;
-      unsigned char in_Ri;
-      unsigned char in_Rj;
-      unsigned char out_Ri;
-    } fmt_xchb;
-  /* cti insns, kept separately so addr_cache is in fixed place */
-  struct {
-    union {
-    struct { /* e.g. jmp @$Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_jmp;
-    struct { /* e.g. call @$Ri */
-      SI * i_Ri;
-      unsigned char in_Ri;
-    } fmt_callr;
-    struct { /* e.g. call $label12 */
-      IADDR i_label12;
-    } fmt_call;
-    struct { /* e.g. ret */
-      int empty;
-    } fmt_ret;
-    struct { /* e.g. int $u8 */
-      UINT f_u8;
-    } fmt_int;
-    struct { /* e.g. inte */
-      int empty;
-    } fmt_inte;
-    struct { /* e.g. reti */
-      int empty;
-    } fmt_reti;
-    struct { /* e.g. bra:d $label9 */
-      IADDR i_label9;
-    } fmt_brad;
-    struct { /* e.g. beq:d $label9 */
-      IADDR i_label9;
-    } fmt_beqd;
-    struct { /* e.g. bc:d $label9 */
-      IADDR i_label9;
-    } fmt_bcd;
-    struct { /* e.g. bn:d $label9 */
-      IADDR i_label9;
-    } fmt_bnd;
-    struct { /* e.g. bv:d $label9 */
-      IADDR i_label9;
-    } fmt_bvd;
-    struct { /* e.g. blt:d $label9 */
-      IADDR i_label9;
-    } fmt_bltd;
-    struct { /* e.g. ble:d $label9 */
-      IADDR i_label9;
-    } fmt_bled;
-    struct { /* e.g. bls:d $label9 */
-      IADDR i_label9;
-    } fmt_blsd;
-    } fields;
-#if WITH_SCACHE_PBB
-    SEM_PC addr_cache;
-#endif
-  } cti;
+  struct { /* no operands */
+    int empty;
+  } fmt_empty;
+  struct { /*  */
+    IADDR i_label9;
+  } sfmt_brad;
+  struct { /*  */
+    UINT f_u8;
+  } sfmt_int;
+  struct { /*  */
+    IADDR i_label12;
+  } sfmt_call;
+  struct { /*  */
+    SI f_s10;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_15;
+  } sfmt_addsp;
+  struct { /*  */
+    USI f_dir10;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_15;
+  } sfmt_dmovr15pi;
+  struct { /*  */
+    UINT f_dir8;
+    unsigned char in_h_gr_13;
+    unsigned char out_h_gr_13;
+  } sfmt_dmovr13pib;
+  struct { /*  */
+    USI f_dir9;
+    unsigned char in_h_gr_13;
+    unsigned char out_h_gr_13;
+  } sfmt_dmovr13pih;
+  struct { /*  */
+    USI f_dir10;
+    unsigned char in_h_gr_13;
+    unsigned char out_h_gr_13;
+  } sfmt_dmovr13pi;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_Rs1;
+    unsigned char in_Ri;
+  } sfmt_mov2dr;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_Rs1;
+    unsigned char out_Ri;
+  } sfmt_movdr;
+  struct { /*  */
+    UINT f_Rs2;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_15;
+  } sfmt_ldr15dr;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_i32;
+    unsigned char out_Ri;
+  } sfmt_ldi32;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_i20;
+    unsigned char out_Ri;
+  } sfmt_ldi20;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_i8;
+    unsigned char out_Ri;
+  } sfmt_ldi8;
+  struct { /*  */
+    SI* i_Ri;
+    unsigned char in_Ri;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_15;
+  } sfmt_str15gr;
+  struct { /*  */
+    SI* i_Ri;
+    USI f_udisp6;
+    unsigned char in_Ri;
+    unsigned char in_h_gr_15;
+  } sfmt_str15;
+  struct { /*  */
+    SI* i_Ri;
+    INT f_disp8;
+    unsigned char in_Ri;
+    unsigned char in_h_gr_14;
+  } sfmt_str14b;
+  struct { /*  */
+    SI* i_Ri;
+    SI f_disp9;
+    unsigned char in_Ri;
+    unsigned char in_h_gr_14;
+  } sfmt_str14h;
+  struct { /*  */
+    SI* i_Ri;
+    SI f_disp10;
+    unsigned char in_Ri;
+    unsigned char in_h_gr_14;
+  } sfmt_str14;
+  struct { /*  */
+    SI* i_Ri;
+    USI f_udisp6;
+    unsigned char in_h_gr_15;
+    unsigned char out_Ri;
+  } sfmt_ldr15;
+  struct { /*  */
+    SI* i_Ri;
+    INT f_disp8;
+    unsigned char in_h_gr_14;
+    unsigned char out_Ri;
+  } sfmt_ldr14ub;
+  struct { /*  */
+    SI* i_Ri;
+    SI f_disp9;
+    unsigned char in_h_gr_14;
+    unsigned char out_Ri;
+  } sfmt_ldr14uh;
+  struct { /*  */
+    SI* i_Ri;
+    SI f_disp10;
+    unsigned char in_h_gr_14;
+    unsigned char out_Ri;
+  } sfmt_ldr14;
+  struct { /*  */
+    SI* i_Ri;
+    SI f_m4;
+    unsigned char in_Ri;
+    unsigned char out_Ri;
+  } sfmt_add2;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_u4;
+    unsigned char in_Ri;
+    unsigned char out_Ri;
+  } sfmt_addi;
+  struct { /*  */
+    USI f_u10;
+    unsigned char in_h_gr_14;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_14;
+    unsigned char out_h_gr_15;
+  } sfmt_enter;
+  struct { /*  */
+    SI* i_Ri;
+    SI* i_Rj;
+    unsigned char in_Ri;
+    unsigned char in_Rj;
+    unsigned char in_h_gr_13;
+  } sfmt_str13;
+  struct { /*  */
+    SI* i_Ri;
+    UINT f_Ri;
+    unsigned char in_h_gr_15;
+    unsigned char out_Ri;
+    unsigned char out_h_gr_15;
+  } sfmt_ldr15gr;
+  struct { /*  */
+    SI* i_Ri;
+    SI* i_Rj;
+    unsigned char in_Rj;
+    unsigned char in_h_gr_13;
+    unsigned char out_Ri;
+  } sfmt_ldr13;
+  struct { /*  */
+    SI* i_Ri;
+    SI* i_Rj;
+    unsigned char in_Ri;
+    unsigned char in_Rj;
+    unsigned char out_Ri;
+  } sfmt_add;
+  struct { /*  */
+    UINT f_reglist_hi_st;
+    unsigned char in_h_gr_10;
+    unsigned char in_h_gr_11;
+    unsigned char in_h_gr_12;
+    unsigned char in_h_gr_13;
+    unsigned char in_h_gr_14;
+    unsigned char in_h_gr_15;
+    unsigned char in_h_gr_8;
+    unsigned char in_h_gr_9;
+    unsigned char out_h_gr_15;
+  } sfmt_stm1;
+  struct { /*  */
+    UINT f_reglist_hi_ld;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_10;
+    unsigned char out_h_gr_11;
+    unsigned char out_h_gr_12;
+    unsigned char out_h_gr_13;
+    unsigned char out_h_gr_14;
+    unsigned char out_h_gr_15;
+    unsigned char out_h_gr_8;
+    unsigned char out_h_gr_9;
+  } sfmt_ldm1;
+  struct { /*  */
+    UINT f_reglist_low_st;
+    unsigned char in_h_gr_0;
+    unsigned char in_h_gr_1;
+    unsigned char in_h_gr_15;
+    unsigned char in_h_gr_2;
+    unsigned char in_h_gr_3;
+    unsigned char in_h_gr_4;
+    unsigned char in_h_gr_5;
+    unsigned char in_h_gr_6;
+    unsigned char in_h_gr_7;
+    unsigned char out_h_gr_15;
+  } sfmt_stm0;
+  struct { /*  */
+    UINT f_reglist_low_ld;
+    unsigned char in_h_gr_15;
+    unsigned char out_h_gr_0;
+    unsigned char out_h_gr_1;
+    unsigned char out_h_gr_15;
+    unsigned char out_h_gr_2;
+    unsigned char out_h_gr_3;
+    unsigned char out_h_gr_4;
+    unsigned char out_h_gr_5;
+    unsigned char out_h_gr_6;
+    unsigned char out_h_gr_7;
+  } sfmt_ldm0;
 #if WITH_SCACHE_PBB
   /* Writeback handler.  */
   struct {
@@ -740,6 +431,7 @@ union sem_fields {
     int insn_count;
     /* Next pbb to execute.  */
     SCACHE *next;
+    SCACHE *branch_target;
   } chain;
 #endif
 };
@@ -751,6 +443,9 @@ struct argbuf {
   const IDESC *idesc;
   char trace_p;
   char profile_p;
+  /* ??? Temporary hack for skip insns.  */
+  char skip_count;
+  char unused;
   /* cpu specific data follows */
   union sem semantic;
   int written;
@@ -771,13 +466,11 @@ struct scache {
    These define and assign the local vars that contain the insn's fields.  */
 
 #define EXTRACT_IFMT_EMPTY_VARS \
-  /* Instruction fields.  */ \
   unsigned int length;
 #define EXTRACT_IFMT_EMPTY_CODE \
   length = 0; \
 
 #define EXTRACT_IFMT_ADD_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_Rj; \
@@ -791,7 +484,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_ADDI_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_u4; \
@@ -805,7 +497,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_ADD2_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   SI f_m4; \
@@ -819,7 +510,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_DIV0S_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_op3; \
@@ -833,7 +523,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_DIV3_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_op3; \
@@ -847,7 +536,6 @@ struct scache {
   f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDI8_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_i8; \
   UINT f_Ri; \
@@ -859,7 +547,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDI20_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_i20_4; \
   UINT f_i20_16; \
@@ -882,7 +569,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDI32_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_i32; \
   UINT f_op2; \
@@ -903,7 +589,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDR14_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   SI f_disp10; \
   UINT f_Ri; \
@@ -915,7 +600,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDR14UH_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   SI f_disp9; \
   UINT f_Ri; \
@@ -927,7 +611,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDR14UB_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   INT f_disp8; \
   UINT f_Ri; \
@@ -939,7 +622,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDR15_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   USI f_udisp6; \
@@ -953,7 +635,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_LDR15DR_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_op3; \
@@ -967,7 +648,6 @@ struct scache {
   f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_MOVDR_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_Rs1; \
@@ -981,7 +661,6 @@ struct scache {
   f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
 
 #define EXTRACT_IFMT_CALL_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op5; \
   SI f_rel12; \
@@ -993,7 +672,6 @@ struct scache {
   f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \
 
 #define EXTRACT_IFMT_INT_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_u8; \
@@ -1005,7 +683,6 @@ struct scache {
   f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
 
 #define EXTRACT_IFMT_BRAD_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_cc; \
   SI f_rel9; \
@@ -1017,7 +694,6 @@ struct scache {
   f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \
 
 #define EXTRACT_IFMT_DMOVR13_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   USI f_dir10; \
@@ -1029,7 +705,6 @@ struct scache {
   f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \
 
 #define EXTRACT_IFMT_DMOVR13H_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   USI f_dir9; \
@@ -1041,7 +716,6 @@ struct scache {
   f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \
 
 #define EXTRACT_IFMT_DMOVR13B_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_dir8; \
@@ -1053,7 +727,6 @@ struct scache {
   f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
 
 #define EXTRACT_IFMT_COPOP_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_ccc; \
   UINT f_op2; \
@@ -1076,7 +749,6 @@ struct scache {
   f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \
 
 #define EXTRACT_IFMT_COPLD_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_ccc; \
   UINT f_op2; \
@@ -1099,7 +771,6 @@ struct scache {
   f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \
 
 #define EXTRACT_IFMT_COPST_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_ccc; \
   UINT f_op2; \
@@ -1122,7 +793,6 @@ struct scache {
   f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \
 
 #define EXTRACT_IFMT_ADDSP_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   SI f_s10; \
@@ -1134,7 +804,6 @@ struct scache {
   f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \
 
 #define EXTRACT_IFMT_LDM0_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_reglist_low_ld; \
@@ -1146,7 +815,6 @@ struct scache {
   f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
 
 #define EXTRACT_IFMT_LDM1_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_reglist_hi_ld; \
@@ -1158,7 +826,6 @@ struct scache {
   f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
 
 #define EXTRACT_IFMT_STM0_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_reglist_low_st; \
@@ -1170,7 +837,6 @@ struct scache {
   f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
 
 #define EXTRACT_IFMT_STM1_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   UINT f_reglist_hi_st; \
@@ -1182,7 +848,6 @@ struct scache {
   f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
 
 #define EXTRACT_IFMT_ENTER_VARS \
-  /* Instruction fields.  */ \
   UINT f_op1; \
   UINT f_op2; \
   USI f_u10; \
diff --git a/sim/fr30/cpuall.h b/sim/fr30/cpuall.h
index dc8ed96..f0ebb90 100644
--- a/sim/fr30/cpuall.h
+++ b/sim/fr30/cpuall.h
@@ -44,6 +44,9 @@ struct argbuf {
   const IDESC *idesc;
   char trace_p;
   char profile_p;
+  /* ??? Temporary hack for skip insns.  */
+  char skip_count;
+  char unused;
   /* cpu specific data follows */
 };
 #endif
diff --git a/sim/fr30/decode.c b/sim/fr30/decode.c
index ef87676..3ed6a11 100644
--- a/sim/fr30/decode.c
+++ b/sim/fr30/decode.c
@@ -28,29 +28,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #include "sim-main.h"
 #include "sim-assert.h"
 
-/* FIXME: Need to review choices for the following.  */
-
-#if WITH_SEM_SWITCH_FULL
-#define FULL(fn)
-#else
-#define FULL(fn) CONCAT3 (fr30bf,_sem_,fn) ,
-#endif
-
-#if WITH_FAST
-#if WITH_SEM_SWITCH_FAST
-#define FAST(fn)
-#else
-#define FAST(fn) CONCAT3 (fr30bf,_semf_,fn) , /* f for fast */
-#endif
-#else
-#define FAST(fn)
-#endif
-
-/* The INSN_ prefix is not here and is instead part of the `insn' argument
-   to avoid collisions with header files (e.g. `AND' in ansidecl.h).  */
-#define IDX(insn) CONCAT2 (FR30BF_,insn)
-#define TYPE(insn) CONCAT2 (FR30_,insn)
-
 /* The instruction descriptor array.
    This is computed at runtime.  Space for it is not malloc'd to save a
    teensy bit of cpu in the decoder.  Moving it to malloc space is trivial
@@ -63,190 +40,183 @@ static IDESC fr30bf_insn_data[FR30BF_INSN_MAX];
 
 static const struct insn_sem fr30bf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid) },
-  { VIRTUAL_INSN_X_AFTER, IDX (INSN_X_AFTER), FULL (x_after) FAST (x_after) },
-  { VIRTUAL_INSN_X_BEFORE, IDX (INSN_X_BEFORE), FULL (x_before) FAST (x_before) },
-  { VIRTUAL_INSN_X_CTI_CHAIN, IDX (INSN_X_CTI_CHAIN), FULL (x_cti_chain) FAST (x_cti_chain) },
-  { VIRTUAL_INSN_X_CHAIN, IDX (INSN_X_CHAIN), FULL (x_chain) FAST (x_chain) },
-  { VIRTUAL_INSN_X_BEGIN, IDX (INSN_X_BEGIN), FULL (x_begin) FAST (x_begin) },
-  { TYPE (INSN_ADD), IDX (INSN_ADD), FULL (add) FAST (add) },
-  { TYPE (INSN_ADDI), IDX (INSN_ADDI), FULL (addi) FAST (addi) },
-  { TYPE (INSN_ADD2), IDX (INSN_ADD2), FULL (add2) FAST (add2) },
-  { TYPE (INSN_ADDC), IDX (INSN_ADDC), FULL (addc) FAST (addc) },
-  { TYPE (INSN_ADDN), IDX (INSN_ADDN), FULL (addn) FAST (addn) },
-  { TYPE (INSN_ADDNI), IDX (INSN_ADDNI), FULL (addni) FAST (addni) },
-  { TYPE (INSN_ADDN2), IDX (INSN_ADDN2), FULL (addn2) FAST (addn2) },
-  { TYPE (INSN_SUB), IDX (INSN_SUB), FULL (sub) FAST (sub) },
-  { TYPE (INSN_SUBC), IDX (INSN_SUBC), FULL (subc) FAST (subc) },
-  { TYPE (INSN_SUBN), IDX (INSN_SUBN), FULL (subn) FAST (subn) },
-  { TYPE (INSN_CMP), IDX (INSN_CMP), FULL (cmp) FAST (cmp) },
-  { TYPE (INSN_CMPI), IDX (INSN_CMPI), FULL (cmpi) FAST (cmpi) },
-  { TYPE (INSN_CMP2), IDX (INSN_CMP2), FULL (cmp2) FAST (cmp2) },
-  { TYPE (INSN_AND), IDX (INSN_AND), FULL (and) FAST (and) },
-  { TYPE (INSN_OR), IDX (INSN_OR), FULL (or) FAST (or) },
-  { TYPE (INSN_EOR), IDX (INSN_EOR), FULL (eor) FAST (eor) },
-  { TYPE (INSN_ANDM), IDX (INSN_ANDM), FULL (andm) FAST (andm) },
-  { TYPE (INSN_ANDH), IDX (INSN_ANDH), FULL (andh) FAST (andh) },
-  { TYPE (INSN_ANDB), IDX (INSN_ANDB), FULL (andb) FAST (andb) },
-  { TYPE (INSN_ORM), IDX (INSN_ORM), FULL (orm) FAST (orm) },
-  { TYPE (INSN_ORH), IDX (INSN_ORH), FULL (orh) FAST (orh) },
-  { TYPE (INSN_ORB), IDX (INSN_ORB), FULL (orb) FAST (orb) },
-  { TYPE (INSN_EORM), IDX (INSN_EORM), FULL (eorm) FAST (eorm) },
-  { TYPE (INSN_EORH), IDX (INSN_EORH), FULL (eorh) FAST (eorh) },
-  { TYPE (INSN_EORB), IDX (INSN_EORB), FULL (eorb) FAST (eorb) },
-  { TYPE (INSN_BANDL), IDX (INSN_BANDL), FULL (bandl) FAST (bandl) },
-  { TYPE (INSN_BORL), IDX (INSN_BORL), FULL (borl) FAST (borl) },
-  { TYPE (INSN_BEORL), IDX (INSN_BEORL), FULL (beorl) FAST (beorl) },
-  { TYPE (INSN_BANDH), IDX (INSN_BANDH), FULL (bandh) FAST (bandh) },
-  { TYPE (INSN_BORH), IDX (INSN_BORH), FULL (borh) FAST (borh) },
-  { TYPE (INSN_BEORH), IDX (INSN_BEORH), FULL (beorh) FAST (beorh) },
-  { TYPE (INSN_BTSTL), IDX (INSN_BTSTL), FULL (btstl) FAST (btstl) },
-  { TYPE (INSN_BTSTH), IDX (INSN_BTSTH), FULL (btsth) FAST (btsth) },
-  { TYPE (INSN_MUL), IDX (INSN_MUL), FULL (mul) FAST (mul) },
-  { TYPE (INSN_MULU), IDX (INSN_MULU), FULL (mulu) FAST (mulu) },
-  { TYPE (INSN_MULH), IDX (INSN_MULH), FULL (mulh) FAST (mulh) },
-  { TYPE (INSN_MULUH), IDX (INSN_MULUH), FULL (muluh) FAST (muluh) },
-  { TYPE (INSN_DIV0S), IDX (INSN_DIV0S), FULL (div0s) FAST (div0s) },
-  { TYPE (INSN_DIV0U), IDX (INSN_DIV0U), FULL (div0u) FAST (div0u) },
-  { TYPE (INSN_DIV1), IDX (INSN_DIV1), FULL (div1) FAST (div1) },
-  { TYPE (INSN_DIV2), IDX (INSN_DIV2), FULL (div2) FAST (div2) },
-  { TYPE (INSN_DIV3), IDX (INSN_DIV3), FULL (div3) FAST (div3) },
-  { TYPE (INSN_DIV4S), IDX (INSN_DIV4S), FULL (div4s) FAST (div4s) },
-  { TYPE (INSN_LSL), IDX (INSN_LSL), FULL (lsl) FAST (lsl) },
-  { TYPE (INSN_LSLI), IDX (INSN_LSLI), FULL (lsli) FAST (lsli) },
-  { TYPE (INSN_LSL2), IDX (INSN_LSL2), FULL (lsl2) FAST (lsl2) },
-  { TYPE (INSN_LSR), IDX (INSN_LSR), FULL (lsr) FAST (lsr) },
-  { TYPE (INSN_LSRI), IDX (INSN_LSRI), FULL (lsri) FAST (lsri) },
-  { TYPE (INSN_LSR2), IDX (INSN_LSR2), FULL (lsr2) FAST (lsr2) },
-  { TYPE (INSN_ASR), IDX (INSN_ASR), FULL (asr) FAST (asr) },
-  { TYPE (INSN_ASRI), IDX (INSN_ASRI), FULL (asri) FAST (asri) },
-  { TYPE (INSN_ASR2), IDX (INSN_ASR2), FULL (asr2) FAST (asr2) },
-  { TYPE (INSN_LDI8), IDX (INSN_LDI8), FULL (ldi8) FAST (ldi8) },
-  { TYPE (INSN_LDI20), IDX (INSN_LDI20), FULL (ldi20) FAST (ldi20) },
-  { TYPE (INSN_LDI32), IDX (INSN_LDI32), FULL (ldi32) FAST (ldi32) },
-  { TYPE (INSN_LD), IDX (INSN_LD), FULL (ld) FAST (ld) },
-  { TYPE (INSN_LDUH), IDX (INSN_LDUH), FULL (lduh) FAST (lduh) },
-  { TYPE (INSN_LDUB), IDX (INSN_LDUB), FULL (ldub) FAST (ldub) },
-  { TYPE (INSN_LDR13), IDX (INSN_LDR13), FULL (ldr13) FAST (ldr13) },
-  { TYPE (INSN_LDR13UH), IDX (INSN_LDR13UH), FULL (ldr13uh) FAST (ldr13uh) },
-  { TYPE (INSN_LDR13UB), IDX (INSN_LDR13UB), FULL (ldr13ub) FAST (ldr13ub) },
-  { TYPE (INSN_LDR14), IDX (INSN_LDR14), FULL (ldr14) FAST (ldr14) },
-  { TYPE (INSN_LDR14UH), IDX (INSN_LDR14UH), FULL (ldr14uh) FAST (ldr14uh) },
-  { TYPE (INSN_LDR14UB), IDX (INSN_LDR14UB), FULL (ldr14ub) FAST (ldr14ub) },
-  { TYPE (INSN_LDR15), IDX (INSN_LDR15), FULL (ldr15) FAST (ldr15) },
-  { TYPE (INSN_LDR15GR), IDX (INSN_LDR15GR), FULL (ldr15gr) FAST (ldr15gr) },
-  { TYPE (INSN_LDR15DR), IDX (INSN_LDR15DR), FULL (ldr15dr) FAST (ldr15dr) },
-  { TYPE (INSN_LDR15PS), IDX (INSN_LDR15PS), FULL (ldr15ps) FAST (ldr15ps) },
-  { TYPE (INSN_ST), IDX (INSN_ST), FULL (st) FAST (st) },
-  { TYPE (INSN_STH), IDX (INSN_STH), FULL (sth) FAST (sth) },
-  { TYPE (INSN_STB), IDX (INSN_STB), FULL (stb) FAST (stb) },
-  { TYPE (INSN_STR13), IDX (INSN_STR13), FULL (str13) FAST (str13) },
-  { TYPE (INSN_STR13H), IDX (INSN_STR13H), FULL (str13h) FAST (str13h) },
-  { TYPE (INSN_STR13B), IDX (INSN_STR13B), FULL (str13b) FAST (str13b) },
-  { TYPE (INSN_STR14), IDX (INSN_STR14), FULL (str14) FAST (str14) },
-  { TYPE (INSN_STR14H), IDX (INSN_STR14H), FULL (str14h) FAST (str14h) },
-  { TYPE (INSN_STR14B), IDX (INSN_STR14B), FULL (str14b) FAST (str14b) },
-  { TYPE (INSN_STR15), IDX (INSN_STR15), FULL (str15) FAST (str15) },
-  { TYPE (INSN_STR15GR), IDX (INSN_STR15GR), FULL (str15gr) FAST (str15gr) },
-  { TYPE (INSN_STR15DR), IDX (INSN_STR15DR), FULL (str15dr) FAST (str15dr) },
-  { TYPE (INSN_STR15PS), IDX (INSN_STR15PS), FULL (str15ps) FAST (str15ps) },
-  { TYPE (INSN_MOV), IDX (INSN_MOV), FULL (mov) FAST (mov) },
-  { TYPE (INSN_MOVDR), IDX (INSN_MOVDR), FULL (movdr) FAST (movdr) },
-  { TYPE (INSN_MOVPS), IDX (INSN_MOVPS), FULL (movps) FAST (movps) },
-  { TYPE (INSN_MOV2DR), IDX (INSN_MOV2DR), FULL (mov2dr) FAST (mov2dr) },
-  { TYPE (INSN_MOV2PS), IDX (INSN_MOV2PS), FULL (mov2ps) FAST (mov2ps) },
-  { TYPE (INSN_JMP), IDX (INSN_JMP), FULL (jmp) FAST (jmp) },
-  { TYPE (INSN_JMPD), IDX (INSN_JMPD), FULL (jmpd) FAST (jmpd) },
-  { TYPE (INSN_CALLR), IDX (INSN_CALLR), FULL (callr) FAST (callr) },
-  { TYPE (INSN_CALLRD), IDX (INSN_CALLRD), FULL (callrd) FAST (callrd) },
-  { TYPE (INSN_CALL), IDX (INSN_CALL), FULL (call) FAST (call) },
-  { TYPE (INSN_CALLD), IDX (INSN_CALLD), FULL (calld) FAST (calld) },
-  { TYPE (INSN_RET), IDX (INSN_RET), FULL (ret) FAST (ret) },
-  { TYPE (INSN_RET_D), IDX (INSN_RET_D), FULL (ret_d) FAST (ret_d) },
-  { TYPE (INSN_INT), IDX (INSN_INT), FULL (int) FAST (int) },
-  { TYPE (INSN_INTE), IDX (INSN_INTE), FULL (inte) FAST (inte) },
-  { TYPE (INSN_RETI), IDX (INSN_RETI), FULL (reti) FAST (reti) },
-  { TYPE (INSN_BRAD), IDX (INSN_BRAD), FULL (brad) FAST (brad) },
-  { TYPE (INSN_BRA), IDX (INSN_BRA), FULL (bra) FAST (bra) },
-  { TYPE (INSN_BNOD), IDX (INSN_BNOD), FULL (bnod) FAST (bnod) },
-  { TYPE (INSN_BNO), IDX (INSN_BNO), FULL (bno) FAST (bno) },
-  { TYPE (INSN_BEQD), IDX (INSN_BEQD), FULL (beqd) FAST (beqd) },
-  { TYPE (INSN_BEQ), IDX (INSN_BEQ), FULL (beq) FAST (beq) },
-  { TYPE (INSN_BNED), IDX (INSN_BNED), FULL (bned) FAST (bned) },
-  { TYPE (INSN_BNE), IDX (INSN_BNE), FULL (bne) FAST (bne) },
-  { TYPE (INSN_BCD), IDX (INSN_BCD), FULL (bcd) FAST (bcd) },
-  { TYPE (INSN_BC), IDX (INSN_BC), FULL (bc) FAST (bc) },
-  { TYPE (INSN_BNCD), IDX (INSN_BNCD), FULL (bncd) FAST (bncd) },
-  { TYPE (INSN_BNC), IDX (INSN_BNC), FULL (bnc) FAST (bnc) },
-  { TYPE (INSN_BND), IDX (INSN_BND), FULL (bnd) FAST (bnd) },
-  { TYPE (INSN_BN), IDX (INSN_BN), FULL (bn) FAST (bn) },
-  { TYPE (INSN_BPD), IDX (INSN_BPD), FULL (bpd) FAST (bpd) },
-  { TYPE (INSN_BP), IDX (INSN_BP), FULL (bp) FAST (bp) },
-  { TYPE (INSN_BVD), IDX (INSN_BVD), FULL (bvd) FAST (bvd) },
-  { TYPE (INSN_BV), IDX (INSN_BV), FULL (bv) FAST (bv) },
-  { TYPE (INSN_BNVD), IDX (INSN_BNVD), FULL (bnvd) FAST (bnvd) },
-  { TYPE (INSN_BNV), IDX (INSN_BNV), FULL (bnv) FAST (bnv) },
-  { TYPE (INSN_BLTD), IDX (INSN_BLTD), FULL (bltd) FAST (bltd) },
-  { TYPE (INSN_BLT), IDX (INSN_BLT), FULL (blt) FAST (blt) },
-  { TYPE (INSN_BGED), IDX (INSN_BGED), FULL (bged) FAST (bged) },
-  { TYPE (INSN_BGE), IDX (INSN_BGE), FULL (bge) FAST (bge) },
-  { TYPE (INSN_BLED), IDX (INSN_BLED), FULL (bled) FAST (bled) },
-  { TYPE (INSN_BLE), IDX (INSN_BLE), FULL (ble) FAST (ble) },
-  { TYPE (INSN_BGTD), IDX (INSN_BGTD), FULL (bgtd) FAST (bgtd) },
-  { TYPE (INSN_BGT), IDX (INSN_BGT), FULL (bgt) FAST (bgt) },
-  { TYPE (INSN_BLSD), IDX (INSN_BLSD), FULL (blsd) FAST (blsd) },
-  { TYPE (INSN_BLS), IDX (INSN_BLS), FULL (bls) FAST (bls) },
-  { TYPE (INSN_BHID), IDX (INSN_BHID), FULL (bhid) FAST (bhid) },
-  { TYPE (INSN_BHI), IDX (INSN_BHI), FULL (bhi) FAST (bhi) },
-  { TYPE (INSN_DMOVR13), IDX (INSN_DMOVR13), FULL (dmovr13) FAST (dmovr13) },
-  { TYPE (INSN_DMOVR13H), IDX (INSN_DMOVR13H), FULL (dmovr13h) FAST (dmovr13h) },
-  { TYPE (INSN_DMOVR13B), IDX (INSN_DMOVR13B), FULL (dmovr13b) FAST (dmovr13b) },
-  { TYPE (INSN_DMOVR13PI), IDX (INSN_DMOVR13PI), FULL (dmovr13pi) FAST (dmovr13pi) },
-  { TYPE (INSN_DMOVR13PIH), IDX (INSN_DMOVR13PIH), FULL (dmovr13pih) FAST (dmovr13pih) },
-  { TYPE (INSN_DMOVR13PIB), IDX (INSN_DMOVR13PIB), FULL (dmovr13pib) FAST (dmovr13pib) },
-  { TYPE (INSN_DMOVR15PI), IDX (INSN_DMOVR15PI), FULL (dmovr15pi) FAST (dmovr15pi) },
-  { TYPE (INSN_DMOV2R13), IDX (INSN_DMOV2R13), FULL (dmov2r13) FAST (dmov2r13) },
-  { TYPE (INSN_DMOV2R13H), IDX (INSN_DMOV2R13H), FULL (dmov2r13h) FAST (dmov2r13h) },
-  { TYPE (INSN_DMOV2R13B), IDX (INSN_DMOV2R13B), FULL (dmov2r13b) FAST (dmov2r13b) },
-  { TYPE (INSN_DMOV2R13PI), IDX (INSN_DMOV2R13PI), FULL (dmov2r13pi) FAST (dmov2r13pi) },
-  { TYPE (INSN_DMOV2R13PIH), IDX (INSN_DMOV2R13PIH), FULL (dmov2r13pih) FAST (dmov2r13pih) },
-  { TYPE (INSN_DMOV2R13PIB), IDX (INSN_DMOV2R13PIB), FULL (dmov2r13pib) FAST (dmov2r13pib) },
-  { TYPE (INSN_DMOV2R15PD), IDX (INSN_DMOV2R15PD), FULL (dmov2r15pd) FAST (dmov2r15pd) },
-  { TYPE (INSN_LDRES), IDX (INSN_LDRES), FULL (ldres) FAST (ldres) },
-  { TYPE (INSN_STRES), IDX (INSN_STRES), FULL (stres) FAST (stres) },
-  { TYPE (INSN_COPOP), IDX (INSN_COPOP), FULL (copop) FAST (copop) },
-  { TYPE (INSN_COPLD), IDX (INSN_COPLD), FULL (copld) FAST (copld) },
-  { TYPE (INSN_COPST), IDX (INSN_COPST), FULL (copst) FAST (copst) },
-  { TYPE (INSN_COPSV), IDX (INSN_COPSV), FULL (copsv) FAST (copsv) },
-  { TYPE (INSN_NOP), IDX (INSN_NOP), FULL (nop) FAST (nop) },
-  { TYPE (INSN_ANDCCR), IDX (INSN_ANDCCR), FULL (andccr) FAST (andccr) },
-  { TYPE (INSN_ORCCR), IDX (INSN_ORCCR), FULL (orccr) FAST (orccr) },
-  { TYPE (INSN_STILM), IDX (INSN_STILM), FULL (stilm) FAST (stilm) },
-  { TYPE (INSN_ADDSP), IDX (INSN_ADDSP), FULL (addsp) FAST (addsp) },
-  { TYPE (INSN_EXTSB), IDX (INSN_EXTSB), FULL (extsb) FAST (extsb) },
-  { TYPE (INSN_EXTUB), IDX (INSN_EXTUB), FULL (extub) FAST (extub) },
-  { TYPE (INSN_EXTSH), IDX (INSN_EXTSH), FULL (extsh) FAST (extsh) },
-  { TYPE (INSN_EXTUH), IDX (INSN_EXTUH), FULL (extuh) FAST (extuh) },
-  { TYPE (INSN_LDM0), IDX (INSN_LDM0), FULL (ldm0) FAST (ldm0) },
-  { TYPE (INSN_LDM1), IDX (INSN_LDM1), FULL (ldm1) FAST (ldm1) },
-  { TYPE (INSN_STM0), IDX (INSN_STM0), FULL (stm0) FAST (stm0) },
-  { TYPE (INSN_STM1), IDX (INSN_STM1), FULL (stm1) FAST (stm1) },
-  { TYPE (INSN_ENTER), IDX (INSN_ENTER), FULL (enter) FAST (enter) },
-  { TYPE (INSN_LEAVE), IDX (INSN_LEAVE), FULL (leave) FAST (leave) },
-  { TYPE (INSN_XCHB), IDX (INSN_XCHB), FULL (xchb) FAST (xchb) },
+  { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY },
+  { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY },
+  { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD },
+  { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI },
+  { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 },
+  { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC },
+  { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN },
+  { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI },
+  { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 },
+  { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD },
+  { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC },
+  { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN },
+  { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP },
+  { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI },
+  { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 },
+  { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND },
+  { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND },
+  { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND },
+  { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM },
+  { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH },
+  { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB },
+  { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM },
+  { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH },
+  { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB },
+  { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM },
+  { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH },
+  { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB },
+  { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL },
+  { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL },
+  { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL },
+  { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL },
+  { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL },
+  { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL },
+  { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL },
+  { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL },
+  { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL },
+  { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU },
+  { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH },
+  { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH },
+  { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S },
+  { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U },
+  { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 },
+  { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 },
+  { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 },
+  { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S },
+  { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL },
+  { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI },
+  { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI },
+  { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL },
+  { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI },
+  { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI },
+  { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL },
+  { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI },
+  { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI },
+  { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 },
+  { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 },
+  { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 },
+  { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD },
+  { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LD },
+  { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LD },
+  { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 },
+  { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13 },
+  { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13 },
+  { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 },
+  { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH },
+  { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB },
+  { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 },
+  { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR },
+  { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR },
+  { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS },
+  { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST },
+  { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_ST },
+  { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_ST },
+  { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 },
+  { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13 },
+  { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13 },
+  { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 },
+  { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H },
+  { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B },
+  { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 },
+  { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR },
+  { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR },
+  { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS },
+  { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV },
+  { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR },
+  { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS },
+  { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR },
+  { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS },
+  { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP },
+  { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP },
+  { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR },
+  { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR },
+  { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL },
+  { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL },
+  { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET },
+  { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET },
+  { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT },
+  { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE },
+  { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI },
+  { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD },
+  { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD },
+  { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD },
+  { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD },
+  { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD },
+  { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD },
+  { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD },
+  { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD },
+  { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD },
+  { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD },
+  { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD },
+  { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD },
+  { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND },
+  { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND },
+  { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND },
+  { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND },
+  { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD },
+  { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD },
+  { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD },
+  { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD },
+  { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD },
+  { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD },
+  { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD },
+  { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD },
+  { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED },
+  { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED },
+  { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED },
+  { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED },
+  { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD },
+  { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD },
+  { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD },
+  { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD },
+  { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 },
+  { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H },
+  { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B },
+  { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI },
+  { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH },
+  { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB },
+  { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI },
+  { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 },
+  { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H },
+  { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B },
+  { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI },
+  { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH },
+  { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB },
+  { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD },
+  { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES },
+  { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES },
+  { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP },
+  { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP },
+  { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP },
+  { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP },
+  { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD },
+  { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR },
+  { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR },
+  { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM },
+  { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP },
+  { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB },
+  { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB },
+  { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH },
+  { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH },
+  { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 },
+  { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 },
+  { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 },
+  { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 },
+  { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER },
+  { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE },
+  { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB },
 };
 
-static const struct insn_sem fr30bf_insn_sem_invalid =
-{
-  VIRTUAL_INSN_X_INVALID, IDX (INSN_X_INVALID), FULL (x_invalid) FAST (x_invalid)
+static const struct insn_sem fr30bf_insn_sem_invalid = {
+  VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY
 };
 
-#undef FMT
-#undef FULL
-#undef FAST
-#undef IDX
-#undef TYPE
-
 /* Initialize an IDESC from the compile-time computable parts.  */
 
 static INLINE void
@@ -255,6 +225,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
   const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
 
   id->num = t->index;
+  id->sfmt = t->sfmt;
   if ((int) t->type <= 0)
     id->idata = & cgen_virtual_insn_table[- (int) t->type];
   else
@@ -262,12 +233,7 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
   id->attrs = CGEN_INSN_ATTRS (id->idata);
   /* Oh my god, a magic number.  */
   id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-#if ! WITH_SEM_SWITCH_FULL
-  id->sem_full = t->sem_full;
-#endif
-#if WITH_FAST && ! WITH_SEM_SWITCH_FAST
-  id->sem_fast = t->sem_fast;
-#endif
+
 #if WITH_PROFILE_MODEL_P
   id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
   {
@@ -275,6 +241,8 @@ init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
     SIM_ASSERT (t->index == id->timing->num);
   }
 #endif
+
+  /* Semantic pointers are initialized elsewhere.  */
 }
 
 /* Initialize the instruction descriptor table.  */
@@ -322,60 +290,60 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       unsigned int val = (((insn >> 8) & (255 << 0)));
       switch (val)
       {
-      case 0 : itype = FR30BF_INSN_LDR13; goto extract_fmt_ldr13;
-      case 1 : itype = FR30BF_INSN_LDR13UH; goto extract_fmt_ldr13;
-      case 2 : itype = FR30BF_INSN_LDR13UB; goto extract_fmt_ldr13;
-      case 3 : itype = FR30BF_INSN_LDR15; goto extract_fmt_ldr15;
-      case 4 : itype = FR30BF_INSN_LD; goto extract_fmt_ld;
-      case 5 : itype = FR30BF_INSN_LDUH; goto extract_fmt_ld;
-      case 6 : itype = FR30BF_INSN_LDUB; goto extract_fmt_ld;
+      case 0 : itype = FR30BF_INSN_LDR13; goto extract_sfmt_ldr13;
+      case 1 : itype = FR30BF_INSN_LDR13UH; goto extract_sfmt_ldr13;
+      case 2 : itype = FR30BF_INSN_LDR13UB; goto extract_sfmt_ldr13;
+      case 3 : itype = FR30BF_INSN_LDR15; goto extract_sfmt_ldr15;
+      case 4 : itype = FR30BF_INSN_LD; goto extract_sfmt_ld;
+      case 5 : itype = FR30BF_INSN_LDUH; goto extract_sfmt_ld;
+      case 6 : itype = FR30BF_INSN_LDUB; goto extract_sfmt_ld;
       case 7 :
         {
           unsigned int val = (((insn >> 4) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = FR30BF_INSN_LDR15GR; goto extract_fmt_ldr15gr;
-          case 1 : itype = FR30BF_INSN_MOV2PS; goto extract_fmt_mov2ps;
-          case 8 : itype = FR30BF_INSN_LDR15DR; goto extract_fmt_ldr15dr;
-          case 9 : itype = FR30BF_INSN_LDR15PS; goto extract_fmt_ldr15ps;
-          default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = FR30BF_INSN_LDR15GR; goto extract_sfmt_ldr15gr;
+          case 1 : itype = FR30BF_INSN_MOV2PS; goto extract_sfmt_mov2ps;
+          case 8 : itype = FR30BF_INSN_LDR15DR; goto extract_sfmt_ldr15dr;
+          case 9 : itype = FR30BF_INSN_LDR15PS; goto extract_sfmt_ldr15ps;
+          default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 8 : itype = FR30BF_INSN_DMOV2R13; goto extract_fmt_dmov2r13;
-      case 9 : itype = FR30BF_INSN_DMOV2R13H; goto extract_fmt_dmov2r13h;
-      case 10 : itype = FR30BF_INSN_DMOV2R13B; goto extract_fmt_dmov2r13b;
-      case 11 : itype = FR30BF_INSN_DMOV2R15PD; goto extract_fmt_dmov2r15pd;
-      case 12 : itype = FR30BF_INSN_DMOV2R13PI; goto extract_fmt_dmov2r13pi;
-      case 13 : itype = FR30BF_INSN_DMOV2R13PIH; goto extract_fmt_dmov2r13pih;
-      case 14 : itype = FR30BF_INSN_DMOV2R13PIB; goto extract_fmt_dmov2r13pib;
-      case 15 : itype = FR30BF_INSN_ENTER; goto extract_fmt_enter;
-      case 16 : itype = FR30BF_INSN_STR13; goto extract_fmt_str13;
-      case 17 : itype = FR30BF_INSN_STR13H; goto extract_fmt_str13;
-      case 18 : itype = FR30BF_INSN_STR13B; goto extract_fmt_str13;
-      case 19 : itype = FR30BF_INSN_STR15; goto extract_fmt_str15;
-      case 20 : itype = FR30BF_INSN_ST; goto extract_fmt_st;
-      case 21 : itype = FR30BF_INSN_STH; goto extract_fmt_st;
-      case 22 : itype = FR30BF_INSN_STB; goto extract_fmt_st;
+      case 8 : itype = FR30BF_INSN_DMOV2R13; goto extract_sfmt_dmov2r13;
+      case 9 : itype = FR30BF_INSN_DMOV2R13H; goto extract_sfmt_dmov2r13h;
+      case 10 : itype = FR30BF_INSN_DMOV2R13B; goto extract_sfmt_dmov2r13b;
+      case 11 : itype = FR30BF_INSN_DMOV2R15PD; goto extract_sfmt_dmov2r15pd;
+      case 12 : itype = FR30BF_INSN_DMOV2R13PI; goto extract_sfmt_dmov2r13pi;
+      case 13 : itype = FR30BF_INSN_DMOV2R13PIH; goto extract_sfmt_dmov2r13pih;
+      case 14 : itype = FR30BF_INSN_DMOV2R13PIB; goto extract_sfmt_dmov2r13pib;
+      case 15 : itype = FR30BF_INSN_ENTER; goto extract_sfmt_enter;
+      case 16 : itype = FR30BF_INSN_STR13; goto extract_sfmt_str13;
+      case 17 : itype = FR30BF_INSN_STR13H; goto extract_sfmt_str13;
+      case 18 : itype = FR30BF_INSN_STR13B; goto extract_sfmt_str13;
+      case 19 : itype = FR30BF_INSN_STR15; goto extract_sfmt_str15;
+      case 20 : itype = FR30BF_INSN_ST; goto extract_sfmt_st;
+      case 21 : itype = FR30BF_INSN_STH; goto extract_sfmt_st;
+      case 22 : itype = FR30BF_INSN_STB; goto extract_sfmt_st;
       case 23 :
         {
           unsigned int val = (((insn >> 4) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = FR30BF_INSN_STR15GR; goto extract_fmt_str15gr;
-          case 1 : itype = FR30BF_INSN_MOVPS; goto extract_fmt_movps;
-          case 8 : itype = FR30BF_INSN_STR15DR; goto extract_fmt_str15dr;
-          case 9 : itype = FR30BF_INSN_STR15PS; goto extract_fmt_str15ps;
-          default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = FR30BF_INSN_STR15GR; goto extract_sfmt_str15gr;
+          case 1 : itype = FR30BF_INSN_MOVPS; goto extract_sfmt_movps;
+          case 8 : itype = FR30BF_INSN_STR15DR; goto extract_sfmt_str15dr;
+          case 9 : itype = FR30BF_INSN_STR15PS; goto extract_sfmt_str15ps;
+          default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 24 : itype = FR30BF_INSN_DMOVR13; goto extract_fmt_dmovr13;
-      case 25 : itype = FR30BF_INSN_DMOVR13H; goto extract_fmt_dmovr13h;
-      case 26 : itype = FR30BF_INSN_DMOVR13B; goto extract_fmt_dmovr13b;
-      case 27 : itype = FR30BF_INSN_DMOVR15PI; goto extract_fmt_dmovr15pi;
-      case 28 : itype = FR30BF_INSN_DMOVR13PI; goto extract_fmt_dmovr13pi;
-      case 29 : itype = FR30BF_INSN_DMOVR13PIH; goto extract_fmt_dmovr13pih;
-      case 30 : itype = FR30BF_INSN_DMOVR13PIB; goto extract_fmt_dmovr13pib;
-      case 31 : itype = FR30BF_INSN_INT; goto extract_fmt_int;
+      case 24 : itype = FR30BF_INSN_DMOVR13; goto extract_sfmt_dmovr13;
+      case 25 : itype = FR30BF_INSN_DMOVR13H; goto extract_sfmt_dmovr13h;
+      case 26 : itype = FR30BF_INSN_DMOVR13B; goto extract_sfmt_dmovr13b;
+      case 27 : itype = FR30BF_INSN_DMOVR15PI; goto extract_sfmt_dmovr15pi;
+      case 28 : itype = FR30BF_INSN_DMOVR13PI; goto extract_sfmt_dmovr13pi;
+      case 29 : itype = FR30BF_INSN_DMOVR13PIH; goto extract_sfmt_dmovr13pih;
+      case 30 : itype = FR30BF_INSN_DMOVR13PIB; goto extract_sfmt_dmovr13pib;
+      case 31 : itype = FR30BF_INSN_INT; goto extract_sfmt_int;
       case 32 : /* fall through */
       case 33 : /* fall through */
       case 34 : /* fall through */
@@ -391,7 +359,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 44 : /* fall through */
       case 45 : /* fall through */
       case 46 : /* fall through */
-      case 47 : itype = FR30BF_INSN_LDR14; goto extract_fmt_ldr14;
+      case 47 : itype = FR30BF_INSN_LDR14; goto extract_sfmt_ldr14;
       case 48 : /* fall through */
       case 49 : /* fall through */
       case 50 : /* fall through */
@@ -407,7 +375,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 60 : /* fall through */
       case 61 : /* fall through */
       case 62 : /* fall through */
-      case 63 : itype = FR30BF_INSN_STR14; goto extract_fmt_str14;
+      case 63 : itype = FR30BF_INSN_STR14; goto extract_sfmt_str14;
       case 64 : /* fall through */
       case 65 : /* fall through */
       case 66 : /* fall through */
@@ -423,7 +391,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 76 : /* fall through */
       case 77 : /* fall through */
       case 78 : /* fall through */
-      case 79 : itype = FR30BF_INSN_LDR14UH; goto extract_fmt_ldr14uh;
+      case 79 : itype = FR30BF_INSN_LDR14UH; goto extract_sfmt_ldr14uh;
       case 80 : /* fall through */
       case 81 : /* fall through */
       case 82 : /* fall through */
@@ -439,7 +407,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 92 : /* fall through */
       case 93 : /* fall through */
       case 94 : /* fall through */
-      case 95 : itype = FR30BF_INSN_STR14H; goto extract_fmt_str14h;
+      case 95 : itype = FR30BF_INSN_STR14H; goto extract_sfmt_str14h;
       case 96 : /* fall through */
       case 97 : /* fall through */
       case 98 : /* fall through */
@@ -455,7 +423,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 108 : /* fall through */
       case 109 : /* fall through */
       case 110 : /* fall through */
-      case 111 : itype = FR30BF_INSN_LDR14UB; goto extract_fmt_ldr14ub;
+      case 111 : itype = FR30BF_INSN_LDR14UB; goto extract_sfmt_ldr14ub;
       case 112 : /* fall through */
       case 113 : /* fall through */
       case 114 : /* fall through */
@@ -471,109 +439,109 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 124 : /* fall through */
       case 125 : /* fall through */
       case 126 : /* fall through */
-      case 127 : itype = FR30BF_INSN_STR14B; goto extract_fmt_str14b;
-      case 128 : itype = FR30BF_INSN_BANDL; goto extract_fmt_bandl;
-      case 129 : itype = FR30BF_INSN_BANDH; goto extract_fmt_bandl;
-      case 130 : itype = FR30BF_INSN_AND; goto extract_fmt_and;
-      case 131 : itype = FR30BF_INSN_ANDCCR; goto extract_fmt_andccr;
-      case 132 : itype = FR30BF_INSN_ANDM; goto extract_fmt_andm;
-      case 133 : itype = FR30BF_INSN_ANDH; goto extract_fmt_andh;
-      case 134 : itype = FR30BF_INSN_ANDB; goto extract_fmt_andb;
-      case 135 : itype = FR30BF_INSN_STILM; goto extract_fmt_stilm;
-      case 136 : itype = FR30BF_INSN_BTSTL; goto extract_fmt_btstl;
-      case 137 : itype = FR30BF_INSN_BTSTH; goto extract_fmt_btstl;
-      case 138 : itype = FR30BF_INSN_XCHB; goto extract_fmt_xchb;
-      case 139 : itype = FR30BF_INSN_MOV; goto extract_fmt_mov;
-      case 140 : itype = FR30BF_INSN_LDM0; goto extract_fmt_ldm0;
-      case 141 : itype = FR30BF_INSN_LDM1; goto extract_fmt_ldm1;
-      case 142 : itype = FR30BF_INSN_STM0; goto extract_fmt_stm0;
-      case 143 : itype = FR30BF_INSN_STM1; goto extract_fmt_stm1;
-      case 144 : itype = FR30BF_INSN_BORL; goto extract_fmt_bandl;
-      case 145 : itype = FR30BF_INSN_BORH; goto extract_fmt_bandl;
-      case 146 : itype = FR30BF_INSN_OR; goto extract_fmt_and;
-      case 147 : itype = FR30BF_INSN_ORCCR; goto extract_fmt_andccr;
-      case 148 : itype = FR30BF_INSN_ORM; goto extract_fmt_andm;
-      case 149 : itype = FR30BF_INSN_ORH; goto extract_fmt_andh;
-      case 150 : itype = FR30BF_INSN_ORB; goto extract_fmt_andb;
+      case 127 : itype = FR30BF_INSN_STR14B; goto extract_sfmt_str14b;
+      case 128 : itype = FR30BF_INSN_BANDL; goto extract_sfmt_bandl;
+      case 129 : itype = FR30BF_INSN_BANDH; goto extract_sfmt_bandl;
+      case 130 : itype = FR30BF_INSN_AND; goto extract_sfmt_and;
+      case 131 : itype = FR30BF_INSN_ANDCCR; goto extract_sfmt_andccr;
+      case 132 : itype = FR30BF_INSN_ANDM; goto extract_sfmt_andm;
+      case 133 : itype = FR30BF_INSN_ANDH; goto extract_sfmt_andh;
+      case 134 : itype = FR30BF_INSN_ANDB; goto extract_sfmt_andb;
+      case 135 : itype = FR30BF_INSN_STILM; goto extract_sfmt_stilm;
+      case 136 : itype = FR30BF_INSN_BTSTL; goto extract_sfmt_btstl;
+      case 137 : itype = FR30BF_INSN_BTSTH; goto extract_sfmt_btstl;
+      case 138 : itype = FR30BF_INSN_XCHB; goto extract_sfmt_xchb;
+      case 139 : itype = FR30BF_INSN_MOV; goto extract_sfmt_mov;
+      case 140 : itype = FR30BF_INSN_LDM0; goto extract_sfmt_ldm0;
+      case 141 : itype = FR30BF_INSN_LDM1; goto extract_sfmt_ldm1;
+      case 142 : itype = FR30BF_INSN_STM0; goto extract_sfmt_stm0;
+      case 143 : itype = FR30BF_INSN_STM1; goto extract_sfmt_stm1;
+      case 144 : itype = FR30BF_INSN_BORL; goto extract_sfmt_bandl;
+      case 145 : itype = FR30BF_INSN_BORH; goto extract_sfmt_bandl;
+      case 146 : itype = FR30BF_INSN_OR; goto extract_sfmt_and;
+      case 147 : itype = FR30BF_INSN_ORCCR; goto extract_sfmt_andccr;
+      case 148 : itype = FR30BF_INSN_ORM; goto extract_sfmt_andm;
+      case 149 : itype = FR30BF_INSN_ORH; goto extract_sfmt_andh;
+      case 150 : itype = FR30BF_INSN_ORB; goto extract_sfmt_andb;
       case 151 :
         {
           unsigned int val = (((insn >> 4) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = FR30BF_INSN_JMP; goto extract_fmt_jmp;
-          case 1 : itype = FR30BF_INSN_CALLR; goto extract_fmt_callr;
-          case 2 : itype = FR30BF_INSN_RET; goto extract_fmt_ret;
-          case 3 : itype = FR30BF_INSN_RETI; goto extract_fmt_reti;
-          case 4 : itype = FR30BF_INSN_DIV0S; goto extract_fmt_div0s;
-          case 5 : itype = FR30BF_INSN_DIV0U; goto extract_fmt_div0u;
-          case 6 : itype = FR30BF_INSN_DIV1; goto extract_fmt_div1;
-          case 7 : itype = FR30BF_INSN_DIV2; goto extract_fmt_div2;
-          case 8 : itype = FR30BF_INSN_EXTSB; goto extract_fmt_extsb;
-          case 9 : itype = FR30BF_INSN_EXTUB; goto extract_fmt_extub;
-          case 10 : itype = FR30BF_INSN_EXTSH; goto extract_fmt_extsh;
-          case 11 : itype = FR30BF_INSN_EXTUH; goto extract_fmt_extuh;
-          default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = FR30BF_INSN_JMP; goto extract_sfmt_jmp;
+          case 1 : itype = FR30BF_INSN_CALLR; goto extract_sfmt_callr;
+          case 2 : itype = FR30BF_INSN_RET; goto extract_sfmt_ret;
+          case 3 : itype = FR30BF_INSN_RETI; goto extract_sfmt_reti;
+          case 4 : itype = FR30BF_INSN_DIV0S; goto extract_sfmt_div0s;
+          case 5 : itype = FR30BF_INSN_DIV0U; goto extract_sfmt_div0u;
+          case 6 : itype = FR30BF_INSN_DIV1; goto extract_sfmt_div1;
+          case 7 : itype = FR30BF_INSN_DIV2; goto extract_sfmt_div2;
+          case 8 : itype = FR30BF_INSN_EXTSB; goto extract_sfmt_extsb;
+          case 9 : itype = FR30BF_INSN_EXTUB; goto extract_sfmt_extub;
+          case 10 : itype = FR30BF_INSN_EXTSH; goto extract_sfmt_extsh;
+          case 11 : itype = FR30BF_INSN_EXTUH; goto extract_sfmt_extuh;
+          default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 152 : itype = FR30BF_INSN_BEORL; goto extract_fmt_bandl;
-      case 153 : itype = FR30BF_INSN_BEORH; goto extract_fmt_bandl;
-      case 154 : itype = FR30BF_INSN_EOR; goto extract_fmt_and;
-      case 155 : itype = FR30BF_INSN_LDI20; goto extract_fmt_ldi20;
-      case 156 : itype = FR30BF_INSN_EORM; goto extract_fmt_andm;
-      case 157 : itype = FR30BF_INSN_EORH; goto extract_fmt_andh;
-      case 158 : itype = FR30BF_INSN_EORB; goto extract_fmt_andb;
+      case 152 : itype = FR30BF_INSN_BEORL; goto extract_sfmt_bandl;
+      case 153 : itype = FR30BF_INSN_BEORH; goto extract_sfmt_bandl;
+      case 154 : itype = FR30BF_INSN_EOR; goto extract_sfmt_and;
+      case 155 : itype = FR30BF_INSN_LDI20; goto extract_sfmt_ldi20;
+      case 156 : itype = FR30BF_INSN_EORM; goto extract_sfmt_andm;
+      case 157 : itype = FR30BF_INSN_EORH; goto extract_sfmt_andh;
+      case 158 : itype = FR30BF_INSN_EORB; goto extract_sfmt_andb;
       case 159 :
         {
           unsigned int val = (((insn >> 4) & (15 << 0)));
           switch (val)
           {
-          case 0 : itype = FR30BF_INSN_JMPD; goto extract_fmt_jmp;
-          case 1 : itype = FR30BF_INSN_CALLRD; goto extract_fmt_callr;
-          case 2 : itype = FR30BF_INSN_RET_D; goto extract_fmt_ret;
-          case 3 : itype = FR30BF_INSN_INTE; goto extract_fmt_inte;
-          case 6 : itype = FR30BF_INSN_DIV3; goto extract_fmt_div3;
-          case 7 : itype = FR30BF_INSN_DIV4S; goto extract_fmt_div4s;
-          case 8 : itype = FR30BF_INSN_LDI32; goto extract_fmt_ldi32;
-          case 9 : itype = FR30BF_INSN_LEAVE; goto extract_fmt_leave;
-          case 10 : itype = FR30BF_INSN_NOP; goto extract_fmt_bnod;
-          case 12 : itype = FR30BF_INSN_COPOP; goto extract_fmt_copop;
-          case 13 : itype = FR30BF_INSN_COPLD; goto extract_fmt_copop;
-          case 14 : itype = FR30BF_INSN_COPST; goto extract_fmt_copop;
-          case 15 : itype = FR30BF_INSN_COPSV; goto extract_fmt_copop;
-          default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty;
+          case 0 : itype = FR30BF_INSN_JMPD; goto extract_sfmt_jmp;
+          case 1 : itype = FR30BF_INSN_CALLRD; goto extract_sfmt_callr;
+          case 2 : itype = FR30BF_INSN_RET_D; goto extract_sfmt_ret;
+          case 3 : itype = FR30BF_INSN_INTE; goto extract_sfmt_inte;
+          case 6 : itype = FR30BF_INSN_DIV3; goto extract_sfmt_div3;
+          case 7 : itype = FR30BF_INSN_DIV4S; goto extract_sfmt_div4s;
+          case 8 : itype = FR30BF_INSN_LDI32; goto extract_sfmt_ldi32;
+          case 9 : itype = FR30BF_INSN_LEAVE; goto extract_sfmt_leave;
+          case 10 : itype = FR30BF_INSN_NOP; goto extract_sfmt_bnod;
+          case 12 : itype = FR30BF_INSN_COPOP; goto extract_sfmt_copop;
+          case 13 : itype = FR30BF_INSN_COPLD; goto extract_sfmt_copop;
+          case 14 : itype = FR30BF_INSN_COPST; goto extract_sfmt_copop;
+          case 15 : itype = FR30BF_INSN_COPSV; goto extract_sfmt_copop;
+          default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
           }
         }
-      case 160 : itype = FR30BF_INSN_ADDNI; goto extract_fmt_addni;
-      case 161 : itype = FR30BF_INSN_ADDN2; goto extract_fmt_addn2;
-      case 162 : itype = FR30BF_INSN_ADDN; goto extract_fmt_addn;
-      case 163 : itype = FR30BF_INSN_ADDSP; goto extract_fmt_addsp;
-      case 164 : itype = FR30BF_INSN_ADDI; goto extract_fmt_addi;
-      case 165 : itype = FR30BF_INSN_ADD2; goto extract_fmt_add2;
-      case 166 : itype = FR30BF_INSN_ADD; goto extract_fmt_add;
-      case 167 : itype = FR30BF_INSN_ADDC; goto extract_fmt_addc;
-      case 168 : itype = FR30BF_INSN_CMPI; goto extract_fmt_cmpi;
-      case 169 : itype = FR30BF_INSN_CMP2; goto extract_fmt_cmp2;
-      case 170 : itype = FR30BF_INSN_CMP; goto extract_fmt_cmp;
-      case 171 : itype = FR30BF_INSN_MULU; goto extract_fmt_mulu;
-      case 172 : itype = FR30BF_INSN_SUB; goto extract_fmt_add;
-      case 173 : itype = FR30BF_INSN_SUBC; goto extract_fmt_addc;
-      case 174 : itype = FR30BF_INSN_SUBN; goto extract_fmt_addn;
-      case 175 : itype = FR30BF_INSN_MUL; goto extract_fmt_mul;
-      case 176 : itype = FR30BF_INSN_LSRI; goto extract_fmt_lsli;
-      case 177 : itype = FR30BF_INSN_LSR2; goto extract_fmt_lsli;
-      case 178 : itype = FR30BF_INSN_LSR; goto extract_fmt_lsl;
-      case 179 : itype = FR30BF_INSN_MOV2DR; goto extract_fmt_mov2dr;
-      case 180 : itype = FR30BF_INSN_LSLI; goto extract_fmt_lsli;
-      case 181 : itype = FR30BF_INSN_LSL2; goto extract_fmt_lsli;
-      case 182 : itype = FR30BF_INSN_LSL; goto extract_fmt_lsl;
-      case 183 : itype = FR30BF_INSN_MOVDR; goto extract_fmt_movdr;
-      case 184 : itype = FR30BF_INSN_ASRI; goto extract_fmt_lsli;
-      case 185 : itype = FR30BF_INSN_ASR2; goto extract_fmt_lsli;
-      case 186 : itype = FR30BF_INSN_ASR; goto extract_fmt_lsl;
-      case 187 : itype = FR30BF_INSN_MULUH; goto extract_fmt_mulh;
-      case 188 : itype = FR30BF_INSN_LDRES; goto extract_fmt_ldres;
-      case 189 : itype = FR30BF_INSN_STRES; goto extract_fmt_ldres;
-      case 191 : itype = FR30BF_INSN_MULH; goto extract_fmt_mulh;
+      case 160 : itype = FR30BF_INSN_ADDNI; goto extract_sfmt_addni;
+      case 161 : itype = FR30BF_INSN_ADDN2; goto extract_sfmt_addn2;
+      case 162 : itype = FR30BF_INSN_ADDN; goto extract_sfmt_addn;
+      case 163 : itype = FR30BF_INSN_ADDSP; goto extract_sfmt_addsp;
+      case 164 : itype = FR30BF_INSN_ADDI; goto extract_sfmt_addi;
+      case 165 : itype = FR30BF_INSN_ADD2; goto extract_sfmt_add2;
+      case 166 : itype = FR30BF_INSN_ADD; goto extract_sfmt_add;
+      case 167 : itype = FR30BF_INSN_ADDC; goto extract_sfmt_addc;
+      case 168 : itype = FR30BF_INSN_CMPI; goto extract_sfmt_cmpi;
+      case 169 : itype = FR30BF_INSN_CMP2; goto extract_sfmt_cmp2;
+      case 170 : itype = FR30BF_INSN_CMP; goto extract_sfmt_cmp;
+      case 171 : itype = FR30BF_INSN_MULU; goto extract_sfmt_mulu;
+      case 172 : itype = FR30BF_INSN_SUB; goto extract_sfmt_add;
+      case 173 : itype = FR30BF_INSN_SUBC; goto extract_sfmt_addc;
+      case 174 : itype = FR30BF_INSN_SUBN; goto extract_sfmt_addn;
+      case 175 : itype = FR30BF_INSN_MUL; goto extract_sfmt_mul;
+      case 176 : itype = FR30BF_INSN_LSRI; goto extract_sfmt_lsli;
+      case 177 : itype = FR30BF_INSN_LSR2; goto extract_sfmt_lsli;
+      case 178 : itype = FR30BF_INSN_LSR; goto extract_sfmt_lsl;
+      case 179 : itype = FR30BF_INSN_MOV2DR; goto extract_sfmt_mov2dr;
+      case 180 : itype = FR30BF_INSN_LSLI; goto extract_sfmt_lsli;
+      case 181 : itype = FR30BF_INSN_LSL2; goto extract_sfmt_lsli;
+      case 182 : itype = FR30BF_INSN_LSL; goto extract_sfmt_lsl;
+      case 183 : itype = FR30BF_INSN_MOVDR; goto extract_sfmt_movdr;
+      case 184 : itype = FR30BF_INSN_ASRI; goto extract_sfmt_lsli;
+      case 185 : itype = FR30BF_INSN_ASR2; goto extract_sfmt_lsli;
+      case 186 : itype = FR30BF_INSN_ASR; goto extract_sfmt_lsl;
+      case 187 : itype = FR30BF_INSN_MULUH; goto extract_sfmt_mulh;
+      case 188 : itype = FR30BF_INSN_LDRES; goto extract_sfmt_ldres;
+      case 189 : itype = FR30BF_INSN_STRES; goto extract_sfmt_ldres;
+      case 191 : itype = FR30BF_INSN_MULH; goto extract_sfmt_mulh;
       case 192 : /* fall through */
       case 193 : /* fall through */
       case 194 : /* fall through */
@@ -589,7 +557,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 204 : /* fall through */
       case 205 : /* fall through */
       case 206 : /* fall through */
-      case 207 : itype = FR30BF_INSN_LDI8; goto extract_fmt_ldi8;
+      case 207 : itype = FR30BF_INSN_LDI8; goto extract_sfmt_ldi8;
       case 208 : /* fall through */
       case 209 : /* fall through */
       case 210 : /* fall through */
@@ -597,7 +565,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 212 : /* fall through */
       case 213 : /* fall through */
       case 214 : /* fall through */
-      case 215 : itype = FR30BF_INSN_CALL; goto extract_fmt_call;
+      case 215 : itype = FR30BF_INSN_CALL; goto extract_sfmt_call;
       case 216 : /* fall through */
       case 217 : /* fall through */
       case 218 : /* fall through */
@@ -605,47 +573,47 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
       case 220 : /* fall through */
       case 221 : /* fall through */
       case 222 : /* fall through */
-      case 223 : itype = FR30BF_INSN_CALLD; goto extract_fmt_call;
-      case 224 : itype = FR30BF_INSN_BRA; goto extract_fmt_brad;
-      case 225 : itype = FR30BF_INSN_BNO; goto extract_fmt_bnod;
-      case 226 : itype = FR30BF_INSN_BEQ; goto extract_fmt_beqd;
-      case 227 : itype = FR30BF_INSN_BNE; goto extract_fmt_beqd;
-      case 228 : itype = FR30BF_INSN_BC; goto extract_fmt_bcd;
-      case 229 : itype = FR30BF_INSN_BNC; goto extract_fmt_bcd;
-      case 230 : itype = FR30BF_INSN_BN; goto extract_fmt_bnd;
-      case 231 : itype = FR30BF_INSN_BP; goto extract_fmt_bnd;
-      case 232 : itype = FR30BF_INSN_BV; goto extract_fmt_bvd;
-      case 233 : itype = FR30BF_INSN_BNV; goto extract_fmt_bvd;
-      case 234 : itype = FR30BF_INSN_BLT; goto extract_fmt_bltd;
-      case 235 : itype = FR30BF_INSN_BGE; goto extract_fmt_bltd;
-      case 236 : itype = FR30BF_INSN_BLE; goto extract_fmt_bled;
-      case 237 : itype = FR30BF_INSN_BGT; goto extract_fmt_bled;
-      case 238 : itype = FR30BF_INSN_BLS; goto extract_fmt_blsd;
-      case 239 : itype = FR30BF_INSN_BHI; goto extract_fmt_blsd;
-      case 240 : itype = FR30BF_INSN_BRAD; goto extract_fmt_brad;
-      case 241 : itype = FR30BF_INSN_BNOD; goto extract_fmt_bnod;
-      case 242 : itype = FR30BF_INSN_BEQD; goto extract_fmt_beqd;
-      case 243 : itype = FR30BF_INSN_BNED; goto extract_fmt_beqd;
-      case 244 : itype = FR30BF_INSN_BCD; goto extract_fmt_bcd;
-      case 245 : itype = FR30BF_INSN_BNCD; goto extract_fmt_bcd;
-      case 246 : itype = FR30BF_INSN_BND; goto extract_fmt_bnd;
-      case 247 : itype = FR30BF_INSN_BPD; goto extract_fmt_bnd;
-      case 248 : itype = FR30BF_INSN_BVD; goto extract_fmt_bvd;
-      case 249 : itype = FR30BF_INSN_BNVD; goto extract_fmt_bvd;
-      case 250 : itype = FR30BF_INSN_BLTD; goto extract_fmt_bltd;
-      case 251 : itype = FR30BF_INSN_BGED; goto extract_fmt_bltd;
-      case 252 : itype = FR30BF_INSN_BLED; goto extract_fmt_bled;
-      case 253 : itype = FR30BF_INSN_BGTD; goto extract_fmt_bled;
-      case 254 : itype = FR30BF_INSN_BLSD; goto extract_fmt_blsd;
-      case 255 : itype = FR30BF_INSN_BHID; goto extract_fmt_blsd;
-      default : itype = FR30BF_INSN_X_INVALID; goto extract_fmt_empty;
+      case 223 : itype = FR30BF_INSN_CALLD; goto extract_sfmt_call;
+      case 224 : itype = FR30BF_INSN_BRA; goto extract_sfmt_brad;
+      case 225 : itype = FR30BF_INSN_BNO; goto extract_sfmt_bnod;
+      case 226 : itype = FR30BF_INSN_BEQ; goto extract_sfmt_beqd;
+      case 227 : itype = FR30BF_INSN_BNE; goto extract_sfmt_beqd;
+      case 228 : itype = FR30BF_INSN_BC; goto extract_sfmt_bcd;
+      case 229 : itype = FR30BF_INSN_BNC; goto extract_sfmt_bcd;
+      case 230 : itype = FR30BF_INSN_BN; goto extract_sfmt_bnd;
+      case 231 : itype = FR30BF_INSN_BP; goto extract_sfmt_bnd;
+      case 232 : itype = FR30BF_INSN_BV; goto extract_sfmt_bvd;
+      case 233 : itype = FR30BF_INSN_BNV; goto extract_sfmt_bvd;
+      case 234 : itype = FR30BF_INSN_BLT; goto extract_sfmt_bltd;
+      case 235 : itype = FR30BF_INSN_BGE; goto extract_sfmt_bltd;
+      case 236 : itype = FR30BF_INSN_BLE; goto extract_sfmt_bled;
+      case 237 : itype = FR30BF_INSN_BGT; goto extract_sfmt_bled;
+      case 238 : itype = FR30BF_INSN_BLS; goto extract_sfmt_blsd;
+      case 239 : itype = FR30BF_INSN_BHI; goto extract_sfmt_blsd;
+      case 240 : itype = FR30BF_INSN_BRAD; goto extract_sfmt_brad;
+      case 241 : itype = FR30BF_INSN_BNOD; goto extract_sfmt_bnod;
+      case 242 : itype = FR30BF_INSN_BEQD; goto extract_sfmt_beqd;
+      case 243 : itype = FR30BF_INSN_BNED; goto extract_sfmt_beqd;
+      case 244 : itype = FR30BF_INSN_BCD; goto extract_sfmt_bcd;
+      case 245 : itype = FR30BF_INSN_BNCD; goto extract_sfmt_bcd;
+      case 246 : itype = FR30BF_INSN_BND; goto extract_sfmt_bnd;
+      case 247 : itype = FR30BF_INSN_BPD; goto extract_sfmt_bnd;
+      case 248 : itype = FR30BF_INSN_BVD; goto extract_sfmt_bvd;
+      case 249 : itype = FR30BF_INSN_BNVD; goto extract_sfmt_bvd;
+      case 250 : itype = FR30BF_INSN_BLTD; goto extract_sfmt_bltd;
+      case 251 : itype = FR30BF_INSN_BGED; goto extract_sfmt_bltd;
+      case 252 : itype = FR30BF_INSN_BLED; goto extract_sfmt_bled;
+      case 253 : itype = FR30BF_INSN_BGTD; goto extract_sfmt_bled;
+      case 254 : itype = FR30BF_INSN_BLSD; goto extract_sfmt_blsd;
+      case 255 : itype = FR30BF_INSN_BHID; goto extract_sfmt_blsd;
+      default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
       }
     }
   }
 
   /* The instruction has been decoded, now extract the fields.  */
 
- extract_fmt_empty:
+ extract_sfmt_empty:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
@@ -653,17 +621,17 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_empty", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_add:
+ extract_sfmt_add:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -673,7 +641,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_add", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -688,11 +656,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_addi:
+ extract_sfmt_addi:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_addi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_u4;
     UINT f_Ri;
 
@@ -702,7 +670,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_u4) = f_u4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -716,11 +684,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_add2:
+ extract_sfmt_add2:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_add2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     SI f_m4;
     UINT f_Ri;
 
@@ -730,7 +698,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_m4) = f_m4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_add2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -744,11 +712,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_addc:
+ extract_sfmt_addc:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -758,7 +726,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addc", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -773,11 +741,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_addn:
+ extract_sfmt_addn:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -787,7 +755,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addn", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -802,11 +770,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_addni:
+ extract_sfmt_addni:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_addni.f
+#define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_u4;
     UINT f_Ri;
 
@@ -816,7 +784,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_u4) = f_u4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addni", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addni", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -830,11 +798,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_addn2:
+ extract_sfmt_addn2:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_addn2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     SI f_m4;
     UINT f_Ri;
 
@@ -844,7 +812,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_m4) = f_m4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addn2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -858,11 +826,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmp:
+ extract_sfmt_cmp:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -872,7 +840,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmp", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -886,11 +854,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmpi:
+ extract_sfmt_cmpi:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_u4;
     UINT f_Ri;
 
@@ -900,7 +868,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_u4) = f_u4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmpi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -913,11 +881,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_cmp2:
+ extract_sfmt_cmp2:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_cmp2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     SI f_m4;
     UINT f_Ri;
 
@@ -927,7 +895,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_m4) = f_m4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_cmp2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp2", "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -940,11 +908,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_and:
+ extract_sfmt_and:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -954,7 +922,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_and", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -969,11 +937,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_andm:
+ extract_sfmt_andm:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -983,7 +951,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andm", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andm", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -997,11 +965,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_andh:
+ extract_sfmt_andh:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1011,7 +979,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1025,11 +993,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_andb:
+ extract_sfmt_andb:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1039,7 +1007,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1053,11 +1021,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bandl:
+ extract_sfmt_bandl:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_u4;
     UINT f_Ri;
 
@@ -1067,7 +1035,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_u4) = f_u4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bandl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bandl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1080,11 +1048,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_btstl:
+ extract_sfmt_btstl:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_u4;
     UINT f_Ri;
 
@@ -1094,7 +1062,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_u4) = f_u4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_btstl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btstl", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1107,11 +1075,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mul:
+ extract_sfmt_mul:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mul.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1121,7 +1089,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mul", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mul", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1135,11 +1103,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mulu:
+ extract_sfmt_mulu:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mulu.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1149,7 +1117,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulu", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulu", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1163,11 +1131,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mulh:
+ extract_sfmt_mulh:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1177,7 +1145,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mulh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulh", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1191,18 +1159,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_div0s:
+ extract_sfmt_div0s:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_div0s.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div0s", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1215,32 +1183,32 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_div0u:
+ extract_sfmt_div0u:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_div0u.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div0u", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_div1:
+ extract_sfmt_div1:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_div1.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div1", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1253,18 +1221,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_div2:
+ extract_sfmt_div2:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_div2.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div2", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div2", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1277,39 +1245,39 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_div3:
+ extract_sfmt_div3:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_div3.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div3", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div3", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_div4s:
+ extract_sfmt_div4s:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_div4s.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_div4s", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div4s", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_lsl:
+ extract_sfmt_lsl:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1319,7 +1287,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lsl", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsl", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1334,11 +1302,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_lsli:
+ extract_sfmt_lsli:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
     UINT f_u4;
     UINT f_Ri;
 
@@ -1348,7 +1316,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_u4) = f_u4;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_lsli", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsli", "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1362,11 +1330,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldi8:
+ extract_sfmt_ldi8:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldi8.f
+#define FLD(f) abuf->fields.sfmt_ldi8.f
     UINT f_i8;
     UINT f_Ri;
 
@@ -1376,7 +1344,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_i8) = f_i8;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi8", "f_i8 0x%x", 'x', f_i8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_i8 0x%x", 'x', f_i8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1389,11 +1357,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldi20:
+ extract_sfmt_ldi20:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldi20.f
+#define FLD(f) abuf->fields.sfmt_ldi20.f
     UINT f_i20_16;
     UINT f_i20_4;
     UINT f_Ri;
@@ -1412,7 +1380,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_i20) = f_i20;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi20", "f_i20 0x%x", 'x', f_i20, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi20", "f_i20 0x%x", 'x', f_i20, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1425,11 +1393,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldi32:
+ extract_sfmt_ldi32:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldi32.f
+#define FLD(f) abuf->fields.sfmt_ldi32.f
     UINT f_i32;
     UINT f_Ri;
     /* Contents of trailing part of insn.  */
@@ -1444,7 +1412,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_i32) = f_i32;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldi32", "f_i32 0x%x", 'x', f_i32, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi32", "f_i32 0x%x", 'x', f_i32, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1457,11 +1425,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ld:
+ extract_sfmt_ld:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1471,7 +1439,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ld", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1485,11 +1453,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr13:
+ extract_sfmt_ldr13:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1499,7 +1467,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr13", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1514,11 +1482,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr14:
+ extract_sfmt_ldr14:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr14.f
+#define FLD(f) abuf->fields.sfmt_ldr14.f
     SI f_disp10;
     UINT f_Ri;
 
@@ -1528,7 +1496,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_disp10) = f_disp10;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1542,11 +1510,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr14uh:
+ extract_sfmt_ldr14uh:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr14uh.f
+#define FLD(f) abuf->fields.sfmt_ldr14uh.f
     SI f_disp9;
     UINT f_Ri;
 
@@ -1556,7 +1524,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_disp9) = f_disp9;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1570,11 +1538,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr14ub:
+ extract_sfmt_ldr14ub:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr14ub.f
+#define FLD(f) abuf->fields.sfmt_ldr14ub.f
     INT f_disp8;
     UINT f_Ri;
 
@@ -1584,7 +1552,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_disp8) = f_disp8;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1598,11 +1566,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr15:
+ extract_sfmt_ldr15:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr15.f
+#define FLD(f) abuf->fields.sfmt_ldr15.f
     USI f_udisp6;
     UINT f_Ri;
 
@@ -1612,7 +1580,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_udisp6) = f_udisp6;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1626,11 +1594,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr15gr:
+ extract_sfmt_ldr15gr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr15gr.f
+#define FLD(f) abuf->fields.sfmt_ldr15gr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
@@ -1638,7 +1606,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_Ri) = f_Ri;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1653,18 +1621,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr15dr:
+ extract_sfmt_ldr15dr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
     UINT f_Rs2;
 
     f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_Rs2) = f_Rs2;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1678,15 +1646,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldr15ps:
+ extract_sfmt_ldr15ps:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldr15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldr15ps", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15ps", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1700,11 +1668,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_st:
+ extract_sfmt_st:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1714,7 +1682,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_st", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1728,11 +1696,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str13:
+ extract_sfmt_str13:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1742,7 +1710,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str13", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1757,11 +1725,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str14:
+ extract_sfmt_str14:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str14.f
+#define FLD(f) abuf->fields.sfmt_str14.f
     SI f_disp10;
     UINT f_Ri;
 
@@ -1771,7 +1739,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_disp10) = f_disp10;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14", "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1785,11 +1753,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str14h:
+ extract_sfmt_str14h:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str14h.f
+#define FLD(f) abuf->fields.sfmt_str14h.f
     SI f_disp9;
     UINT f_Ri;
 
@@ -1799,7 +1767,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_disp9) = f_disp9;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str14h", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14h", "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1813,11 +1781,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str14b:
+ extract_sfmt_str14b:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str14b.f
+#define FLD(f) abuf->fields.sfmt_str14b.f
     INT f_disp8;
     UINT f_Ri;
 
@@ -1827,7 +1795,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_disp8) = f_disp8;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str14b", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14b", "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1841,11 +1809,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str15:
+ extract_sfmt_str15:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str15.f
+#define FLD(f) abuf->fields.sfmt_str15.f
     USI f_udisp6;
     UINT f_Ri;
 
@@ -1855,7 +1823,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_udisp6) = f_udisp6;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15", "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1869,18 +1837,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str15gr:
+ extract_sfmt_str15gr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str15gr.f
+#define FLD(f) abuf->fields.sfmt_str15gr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15gr", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15gr", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1895,18 +1863,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str15dr:
+ extract_sfmt_str15dr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
     UINT f_Rs2;
 
     f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_Rs2) = f_Rs2;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1920,15 +1888,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_str15ps:
+ extract_sfmt_str15ps:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_str15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_str15ps", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15ps", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1942,11 +1910,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mov:
+ extract_sfmt_mov:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mov.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -1956,7 +1924,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mov", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov", "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1970,11 +1938,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movdr:
+ extract_sfmt_movdr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movdr.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
     UINT f_Rs1;
     UINT f_Ri;
 
@@ -1984,7 +1952,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_Rs1) = f_Rs1;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -1997,18 +1965,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_movps:
+ extract_sfmt_movps:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_movps.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_movps", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movps", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2021,11 +1989,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mov2dr:
+ extract_sfmt_mov2dr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mov2dr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Rs1;
     UINT f_Ri;
 
@@ -2035,7 +2003,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (f_Rs1) = f_Rs1;
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mov2dr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2dr", "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2048,18 +2016,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_mov2ps:
+ extract_sfmt_mov2ps:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_mov2ps.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_mov2ps", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2ps", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2072,19 +2040,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_jmp:
+ extract_sfmt_jmp:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_jmp", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2097,19 +2064,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_callr:
+ extract_sfmt_callr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_callr", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callr", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2122,19 +2088,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_call:
+ extract_sfmt_call:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
     SI f_rel12;
 
     f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label12) = f_rel12;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2146,16 +2111,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ret:
+ extract_sfmt_ret:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ret", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2167,19 +2131,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_int:
+ extract_sfmt_int:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_int.f
+#define FLD(f) abuf->fields.sfmt_int.f
     UINT f_u8;
 
     f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_u8) = f_u8;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2191,16 +2154,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_inte:
+ extract_sfmt_inte:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_inte.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_inte", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_inte", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2212,16 +2174,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_reti:
+ extract_sfmt_reti:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_reti.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_reti", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_reti", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2233,19 +2194,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_brad:
+ extract_sfmt_brad:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2257,33 +2217,32 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bnod:
+ extract_sfmt_bnod:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bnod", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnod", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_beqd:
+ extract_sfmt_beqd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2295,19 +2254,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bcd:
+ extract_sfmt_bcd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2319,19 +2277,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bnd:
+ extract_sfmt_bnd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2343,19 +2300,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bvd:
+ extract_sfmt_bvd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2367,19 +2323,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bltd:
+ extract_sfmt_bltd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2391,19 +2346,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_bled:
+ extract_sfmt_bled:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2415,19 +2369,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_blsd:
+ extract_sfmt_blsd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
     SI f_rel9;
 
     f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
 
   /* Record the fields for the semantic handler.  */
   FLD (i_label9) = f_rel9;
-  SEM_BRANCH_INIT_EXTRACT (abuf);
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2439,18 +2392,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr13:
+ extract_sfmt_dmovr13:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
     USI f_dir10;
 
     f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir10) = f_dir10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2463,18 +2416,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr13h:
+ extract_sfmt_dmovr13h:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
     USI f_dir9;
 
     f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir9) = f_dir9;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2487,18 +2440,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr13b:
+ extract_sfmt_dmovr13b:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
     UINT f_dir8;
 
     f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir8) = f_dir8;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2511,18 +2464,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr13pi:
+ extract_sfmt_dmovr13pi:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
     USI f_dir10;
 
     f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir10) = f_dir10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2536,18 +2489,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr13pih:
+ extract_sfmt_dmovr13pih:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
     USI f_dir9;
 
     f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir9) = f_dir9;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2561,18 +2514,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr13pib:
+ extract_sfmt_dmovr13pib:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
     UINT f_dir8;
 
     f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir8) = f_dir8;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2586,18 +2539,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmovr15pi:
+ extract_sfmt_dmovr15pi:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmovr15pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
     USI f_dir10;
 
     f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir10) = f_dir10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2611,18 +2564,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r13:
+ extract_sfmt_dmov2r13:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
     USI f_dir10;
 
     f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir10) = f_dir10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2635,18 +2588,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r13h:
+ extract_sfmt_dmov2r13h:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
     USI f_dir9;
 
     f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir9) = f_dir9;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2659,18 +2612,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r13b:
+ extract_sfmt_dmov2r13b:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
     UINT f_dir8;
 
     f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir8) = f_dir8;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2683,18 +2636,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r13pi:
+ extract_sfmt_dmov2r13pi:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
     USI f_dir10;
 
     f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir10) = f_dir10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2708,18 +2661,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r13pih:
+ extract_sfmt_dmov2r13pih:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
     USI f_dir9;
 
     f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir9) = f_dir9;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2733,18 +2686,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r13pib:
+ extract_sfmt_dmov2r13pib:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
     UINT f_dir8;
 
     f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir8) = f_dir8;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2758,18 +2711,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_dmov2r15pd:
+ extract_sfmt_dmov2r15pd:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_dmov2r15pd.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
     USI f_dir10;
 
     f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_dir10) = f_dir10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2783,18 +2736,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldres:
+ extract_sfmt_ldres:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldres", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldres", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2808,69 +2761,69 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_copop:
+ extract_sfmt_copop:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
     /* Contents of trailing part of insn.  */
     UINT word_1;
 
   word_1 = GETIMEMUHI (current_cpu, pc + 2);
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_copop", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_copop", (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_andccr:
+ extract_sfmt_andccr:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
     UINT f_u8;
 
     f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_u8) = f_u8;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_stilm:
+ extract_sfmt_stilm:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stilm.f
+#define FLD(f) abuf->fields.sfmt_int.f
     UINT f_u8;
 
     f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_u8) = f_u8;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0));
 
 #undef FLD
     return idesc;
   }
 
- extract_fmt_addsp:
+ extract_sfmt_addsp:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_addsp.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
     SI f_s10;
 
     f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_s10) = f_s10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2884,18 +2837,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_extsb:
+ extract_sfmt_extsb:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_extsb.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extsb", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2909,18 +2862,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_extub:
+ extract_sfmt_extub:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_extub.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extub", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extub", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2934,18 +2887,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_extsh:
+ extract_sfmt_extsh:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_extsh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extsh", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsh", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2959,18 +2912,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_extuh:
+ extract_sfmt_extuh:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_extuh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
     UINT f_Ri;
 
     f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_extuh", "Ri 0x%x", 'x', f_Ri, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extuh", "Ri 0x%x", 'x', f_Ri, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -2984,18 +2937,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldm0:
+ extract_sfmt_ldm0:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldm0.f
+#define FLD(f) abuf->fields.sfmt_ldm0.f
     UINT f_reglist_low_ld;
 
     f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_reglist_low_ld) = f_reglist_low_ld;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3017,18 +2970,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_ldm1:
+ extract_sfmt_ldm1:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_ldm1.f
+#define FLD(f) abuf->fields.sfmt_ldm1.f
     UINT f_reglist_hi_ld;
 
     f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_reglist_hi_ld) = f_reglist_hi_ld;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3049,18 +3002,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stm0:
+ extract_sfmt_stm0:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stm0.f
+#define FLD(f) abuf->fields.sfmt_stm0.f
     UINT f_reglist_low_st;
 
     f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_reglist_low_st) = f_reglist_low_st;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3082,18 +3035,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_stm1:
+ extract_sfmt_stm1:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_stm1.f
+#define FLD(f) abuf->fields.sfmt_stm1.f
     UINT f_reglist_hi_st;
 
     f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
 
   /* Record the fields for the semantic handler.  */
   FLD (f_reglist_hi_st) = f_reglist_hi_st;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3114,18 +3067,18 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_enter:
+ extract_sfmt_enter:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_enter.f
+#define FLD(f) abuf->fields.sfmt_enter.f
     USI f_u10;
 
     f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
 
   /* Record the fields for the semantic handler.  */
   FLD (f_u10) = f_u10;
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3141,15 +3094,15 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_leave:
+ extract_sfmt_leave:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_leave.f
+#define FLD(f) abuf->fields.sfmt_enter.f
 
 
   /* Record the fields for the semantic handler.  */
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_leave", (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_leave", (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
@@ -3165,11 +3118,11 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
     return idesc;
   }
 
- extract_fmt_xchb:
+ extract_sfmt_xchb:
   {
     const IDESC *idesc = &fr30bf_insn_data[itype];
     CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_xchb.f
+#define FLD(f) abuf->fields.sfmt_add.f
     UINT f_Rj;
     UINT f_Ri;
 
@@ -3179,7 +3132,7 @@ fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
   /* Record the fields for the semantic handler.  */
   FLD (i_Ri) = & CPU (h_gr)[f_Ri];
   FLD (i_Rj) = & CPU (h_gr)[f_Rj];
-  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "fmt_xchb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
+  TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xchb", "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
 
 #if WITH_PROFILE_MODEL_P
   /* Record the fields for profiling.  */
diff --git a/sim/fr30/decode.h b/sim/fr30/decode.h
index 4bc943e..eda9c55 100644
--- a/sim/fr30/decode.h
+++ b/sim/fr30/decode.h
@@ -29,6 +29,8 @@ extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR,
                                   CGEN_INSN_INT,
                                   ARGBUF *);
 extern void fr30bf_init_idesc_table (SIM_CPU *);
+extern void fr30bf_sem_init_idesc_table (SIM_CPU *);
+extern void fr30bf_semf_init_idesc_table (SIM_CPU *);
 
 /* Enum declaration for instructions in cpu family fr30bf.  */
 typedef enum fr30bf_insn_type {
@@ -77,200 +79,34 @@ typedef enum fr30bf_insn_type {
  , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX
 } FR30BF_INSN_TYPE;
 
-#if ! WITH_SEM_SWITCH_FULL
-#define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,fn);
-#else
-#define SEMFULL(fn)
-#endif
-
-#if ! WITH_SEM_SWITCH_FAST
-#define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (fr30bf,_semf_,fn);
-#else
-#define SEMFAST(fn)
-#endif
-
-#define SEM(fn) SEMFULL (fn) SEMFAST (fn)
-
-/* The function version of the before/after handlers is always needed,
-   so we always want the SEMFULL declaration of them.  */
-extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,x_before);
-extern SEMANTIC_FN CONCAT3 (fr30bf,_sem_,x_after);
-
-SEM (x_invalid)
-SEM (x_after)
-SEM (x_before)
-SEM (x_cti_chain)
-SEM (x_chain)
-SEM (x_begin)
-SEM (add)
-SEM (addi)
-SEM (add2)
-SEM (addc)
-SEM (addn)
-SEM (addni)
-SEM (addn2)
-SEM (sub)
-SEM (subc)
-SEM (subn)
-SEM (cmp)
-SEM (cmpi)
-SEM (cmp2)
-SEM (and)
-SEM (or)
-SEM (eor)
-SEM (andm)
-SEM (andh)
-SEM (andb)
-SEM (orm)
-SEM (orh)
-SEM (orb)
-SEM (eorm)
-SEM (eorh)
-SEM (eorb)
-SEM (bandl)
-SEM (borl)
-SEM (beorl)
-SEM (bandh)
-SEM (borh)
-SEM (beorh)
-SEM (btstl)
-SEM (btsth)
-SEM (mul)
-SEM (mulu)
-SEM (mulh)
-SEM (muluh)
-SEM (div0s)
-SEM (div0u)
-SEM (div1)
-SEM (div2)
-SEM (div3)
-SEM (div4s)
-SEM (lsl)
-SEM (lsli)
-SEM (lsl2)
-SEM (lsr)
-SEM (lsri)
-SEM (lsr2)
-SEM (asr)
-SEM (asri)
-SEM (asr2)
-SEM (ldi8)
-SEM (ldi20)
-SEM (ldi32)
-SEM (ld)
-SEM (lduh)
-SEM (ldub)
-SEM (ldr13)
-SEM (ldr13uh)
-SEM (ldr13ub)
-SEM (ldr14)
-SEM (ldr14uh)
-SEM (ldr14ub)
-SEM (ldr15)
-SEM (ldr15gr)
-SEM (ldr15dr)
-SEM (ldr15ps)
-SEM (st)
-SEM (sth)
-SEM (stb)
-SEM (str13)
-SEM (str13h)
-SEM (str13b)
-SEM (str14)
-SEM (str14h)
-SEM (str14b)
-SEM (str15)
-SEM (str15gr)
-SEM (str15dr)
-SEM (str15ps)
-SEM (mov)
-SEM (movdr)
-SEM (movps)
-SEM (mov2dr)
-SEM (mov2ps)
-SEM (jmp)
-SEM (jmpd)
-SEM (callr)
-SEM (callrd)
-SEM (call)
-SEM (calld)
-SEM (ret)
-SEM (ret_d)
-SEM (int)
-SEM (inte)
-SEM (reti)
-SEM (brad)
-SEM (bra)
-SEM (bnod)
-SEM (bno)
-SEM (beqd)
-SEM (beq)
-SEM (bned)
-SEM (bne)
-SEM (bcd)
-SEM (bc)
-SEM (bncd)
-SEM (bnc)
-SEM (bnd)
-SEM (bn)
-SEM (bpd)
-SEM (bp)
-SEM (bvd)
-SEM (bv)
-SEM (bnvd)
-SEM (bnv)
-SEM (bltd)
-SEM (blt)
-SEM (bged)
-SEM (bge)
-SEM (bled)
-SEM (ble)
-SEM (bgtd)
-SEM (bgt)
-SEM (blsd)
-SEM (bls)
-SEM (bhid)
-SEM (bhi)
-SEM (dmovr13)
-SEM (dmovr13h)
-SEM (dmovr13b)
-SEM (dmovr13pi)
-SEM (dmovr13pih)
-SEM (dmovr13pib)
-SEM (dmovr15pi)
-SEM (dmov2r13)
-SEM (dmov2r13h)
-SEM (dmov2r13b)
-SEM (dmov2r13pi)
-SEM (dmov2r13pih)
-SEM (dmov2r13pib)
-SEM (dmov2r15pd)
-SEM (ldres)
-SEM (stres)
-SEM (copop)
-SEM (copld)
-SEM (copst)
-SEM (copsv)
-SEM (nop)
-SEM (andccr)
-SEM (orccr)
-SEM (stilm)
-SEM (addsp)
-SEM (extsb)
-SEM (extub)
-SEM (extsh)
-SEM (extuh)
-SEM (ldm0)
-SEM (ldm1)
-SEM (stm0)
-SEM (stm1)
-SEM (enter)
-SEM (leave)
-SEM (xchb)
-
-#undef SEMFULL
-#undef SEMFAST
-#undef SEM
+/* Enum declaration for semantic formats in cpu family fr30bf.  */
+typedef enum fr30bf_sfmt_type {
+  FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2
+ , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2
+ , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND
+ , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL
+ , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH
+ , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2
+ , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI
+ , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD
+ , FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB
+ , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS
+ , FR30BF_SFMT_ST, FR30BF_SFMT_STR13, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H
+ , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR
+ , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS
+ , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR
+ , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE
+ , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD
+ , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD
+ , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H
+ , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB
+ , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B
+ , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD
+ , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM
+ , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH
+ , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0
+ , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB
+} FR30BF_SFMT_TYPE;
 
 /* Function unit handlers (user written).  */
 
diff --git a/sim/fr30/model.c b/sim/fr30/model.c
index 9dd6612..59e6901 100644
--- a/sim/fr30/model.c
+++ b/sim/fr30/model.c
@@ -37,7 +37,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 static int
 model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -62,7 +62,7 @@ model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -85,7 +85,7 @@ model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -108,7 +108,7 @@ model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -133,7 +133,7 @@ model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -158,7 +158,7 @@ model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addni.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -181,7 +181,7 @@ model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addn2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -204,7 +204,7 @@ model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -229,7 +229,7 @@ model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -254,7 +254,7 @@ model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -279,7 +279,7 @@ model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -302,7 +302,7 @@ model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -323,7 +323,7 @@ model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -344,7 +344,7 @@ model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -369,7 +369,7 @@ model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -394,7 +394,7 @@ model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -419,7 +419,7 @@ model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -462,7 +462,7 @@ model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -505,7 +505,7 @@ model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -548,7 +548,7 @@ model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -591,7 +591,7 @@ model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -634,7 +634,7 @@ model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -677,7 +677,7 @@ model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -720,7 +720,7 @@ model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -763,7 +763,7 @@ model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -806,7 +806,7 @@ model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -843,7 +843,7 @@ model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -880,7 +880,7 @@ model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -917,7 +917,7 @@ model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -954,7 +954,7 @@ model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -991,7 +991,7 @@ model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1028,7 +1028,7 @@ model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1056,7 +1056,7 @@ model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1084,7 +1084,7 @@ model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mul.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1107,7 +1107,7 @@ model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulu.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1130,7 +1130,7 @@ model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1153,7 +1153,7 @@ model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1176,7 +1176,7 @@ model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div0s.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1197,7 +1197,7 @@ model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div0u.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1216,7 +1216,7 @@ model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div1.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1237,7 +1237,7 @@ model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div2.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1258,7 +1258,7 @@ model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div3.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1277,7 +1277,7 @@ model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div4s.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1296,7 +1296,7 @@ model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1321,7 +1321,7 @@ model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1344,7 +1344,7 @@ model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1367,7 +1367,7 @@ model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1392,7 +1392,7 @@ model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1415,7 +1415,7 @@ model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1438,7 +1438,7 @@ model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1463,7 +1463,7 @@ model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1486,7 +1486,7 @@ model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1509,7 +1509,7 @@ model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi8.f
+#define FLD(f) abuf->fields.sfmt_ldi8.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1530,7 +1530,7 @@ model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi20.f
+#define FLD(f) abuf->fields.sfmt_ldi20.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1551,7 +1551,7 @@ model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi32.f
+#define FLD(f) abuf->fields.sfmt_ldi32.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1572,7 +1572,7 @@ model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1594,7 +1594,7 @@ model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1616,7 +1616,7 @@ model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1638,7 +1638,7 @@ model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1660,7 +1660,7 @@ model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1682,7 +1682,7 @@ model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1704,7 +1704,7 @@ model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr14.f
+#define FLD(f) abuf->fields.sfmt_ldr14.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1724,7 +1724,7 @@ model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr14uh.f
+#define FLD(f) abuf->fields.sfmt_ldr14uh.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1744,7 +1744,7 @@ model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr14ub.f
+#define FLD(f) abuf->fields.sfmt_ldr14ub.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1764,7 +1764,7 @@ model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15.f
+#define FLD(f) abuf->fields.sfmt_ldr15.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1784,7 +1784,7 @@ model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15gr.f
+#define FLD(f) abuf->fields.sfmt_ldr15gr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1804,7 +1804,7 @@ model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1822,7 +1822,7 @@ model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1840,7 +1840,7 @@ model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1862,7 +1862,7 @@ model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1884,7 +1884,7 @@ model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1906,7 +1906,7 @@ model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1928,7 +1928,7 @@ model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1950,7 +1950,7 @@ model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1972,7 +1972,7 @@ model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str14.f
+#define FLD(f) abuf->fields.sfmt_str14.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -1992,7 +1992,7 @@ model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str14h.f
+#define FLD(f) abuf->fields.sfmt_str14h.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2012,7 +2012,7 @@ model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str14b.f
+#define FLD(f) abuf->fields.sfmt_str14b.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2032,7 +2032,7 @@ model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15.f
+#define FLD(f) abuf->fields.sfmt_str15.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2052,7 +2052,7 @@ model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15gr.f
+#define FLD(f) abuf->fields.sfmt_str15gr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2072,7 +2072,7 @@ model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2090,7 +2090,7 @@ model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2108,7 +2108,7 @@ model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mov.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2131,7 +2131,7 @@ model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movdr.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2152,7 +2152,7 @@ model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movps.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2173,7 +2173,7 @@ model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mov2dr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2194,7 +2194,7 @@ model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mov2ps.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2215,7 +2215,7 @@ model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2235,7 +2235,7 @@ model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2255,7 +2255,7 @@ model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2275,7 +2275,7 @@ model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2295,7 +2295,7 @@ model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2313,7 +2313,7 @@ model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2331,7 +2331,7 @@ model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2349,7 +2349,7 @@ model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2367,7 +2367,7 @@ model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_int.f
+#define FLD(f) abuf->fields.sfmt_int.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2386,7 +2386,7 @@ model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_inte.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2405,7 +2405,7 @@ model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_reti.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2424,7 +2424,7 @@ model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2442,7 +2442,7 @@ model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2460,7 +2460,7 @@ model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2477,7 +2477,7 @@ model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2494,7 +2494,7 @@ model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2512,7 +2512,7 @@ model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2530,7 +2530,7 @@ model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2548,7 +2548,7 @@ model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2566,7 +2566,7 @@ model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2584,7 +2584,7 @@ model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2602,7 +2602,7 @@ model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2620,7 +2620,7 @@ model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2638,7 +2638,7 @@ model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2656,7 +2656,7 @@ model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2674,7 +2674,7 @@ model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2692,7 +2692,7 @@ model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2710,7 +2710,7 @@ model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2728,7 +2728,7 @@ model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2746,7 +2746,7 @@ model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2764,7 +2764,7 @@ model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2782,7 +2782,7 @@ model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2800,7 +2800,7 @@ model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2818,7 +2818,7 @@ model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2836,7 +2836,7 @@ model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2854,7 +2854,7 @@ model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2872,7 +2872,7 @@ model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2890,7 +2890,7 @@ model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2908,7 +2908,7 @@ model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2926,7 +2926,7 @@ model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2944,7 +2944,7 @@ model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2962,7 +2962,7 @@ model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2980,7 +2980,7 @@ model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -2998,7 +2998,7 @@ model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3016,7 +3016,7 @@ model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3034,7 +3034,7 @@ model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3052,7 +3052,7 @@ model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3077,7 +3077,7 @@ model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3102,7 +3102,7 @@ model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3127,7 +3127,7 @@ model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr15pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3152,7 +3152,7 @@ model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3170,7 +3170,7 @@ model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3188,7 +3188,7 @@ model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3206,7 +3206,7 @@ model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3231,7 +3231,7 @@ model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3256,7 +3256,7 @@ model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3281,7 +3281,7 @@ model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r15pd.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3306,7 +3306,7 @@ model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3329,7 +3329,7 @@ model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3352,7 +3352,7 @@ model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3371,7 +3371,7 @@ model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3390,7 +3390,7 @@ model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3409,7 +3409,7 @@ model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3428,7 +3428,7 @@ model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3447,7 +3447,7 @@ model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3466,7 +3466,7 @@ model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3485,7 +3485,7 @@ model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stilm.f
+#define FLD(f) abuf->fields.sfmt_int.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3504,7 +3504,7 @@ model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addsp.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3523,7 +3523,7 @@ model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extsb.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3546,7 +3546,7 @@ model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extub.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3569,7 +3569,7 @@ model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extsh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3592,7 +3592,7 @@ model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extuh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3615,7 +3615,7 @@ model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldm0.f
+#define FLD(f) abuf->fields.sfmt_ldm0.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3632,7 +3632,7 @@ model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldm1.f
+#define FLD(f) abuf->fields.sfmt_ldm1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3649,7 +3649,7 @@ model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stm0.f
+#define FLD(f) abuf->fields.sfmt_stm0.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3666,7 +3666,7 @@ model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stm1.f
+#define FLD(f) abuf->fields.sfmt_stm1.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3683,7 +3683,7 @@ model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_enter.f
+#define FLD(f) abuf->fields.sfmt_enter.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3702,7 +3702,7 @@ model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_leave.f
+#define FLD(f) abuf->fields.sfmt_enter.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
@@ -3721,7 +3721,7 @@ model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg)
 static int
 model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_xchb.f
+#define FLD(f) abuf->fields.sfmt_add.f
   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
   const IDESC * UNUSED idesc = abuf->idesc;
   int cycles = 0;
diff --git a/sim/fr30/sem-switch.c b/sim/fr30/sem-switch.c
index 2f8827e..f73f11a 100644
--- a/sim/fr30/sem-switch.c
+++ b/sim/fr30/sem-switch.c
@@ -208,11 +208,13 @@ with this program; if not, write to the Free Software Foundation, Inc.,
   int i;
 
   for (i = 0; labels[i].label != 0; ++i)
+    {
 #if FAST_P
-    CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
+      CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 #else
-    CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
+      CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 #endif
+    }
 
 #undef DEFINE_LABELS
 #endif /* DEFINE_LABELS */
@@ -332,12 +334,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 #if WITH_SCACHE_PBB_FR30BF
 #ifdef DEFINE_SWITCH
     vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
-			       pbb_br_npc_ptr, pbb_br_npc);
+			       pbb_br_type, pbb_br_npc);
     BREAK (sem);
 #else
     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
     vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
-			       CPU_PBB_BR_NPC_PTR (current_cpu),
+			       CPU_PBB_BR_TYPE (current_cpu),
 			       CPU_PBB_BR_NPC (current_cpu));
 #endif
 #endif
@@ -398,7 +400,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -441,7 +443,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -484,7 +486,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_add2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -527,7 +529,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -572,7 +574,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -591,7 +593,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addni.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -610,7 +612,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addn2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -629,7 +631,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -672,7 +674,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -717,7 +719,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -736,7 +738,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -776,7 +778,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -816,7 +818,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_cmp2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -856,7 +858,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -889,7 +891,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -922,7 +924,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -955,7 +957,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -990,7 +992,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1025,7 +1027,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1060,7 +1062,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1095,7 +1097,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1130,7 +1132,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1165,7 +1167,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1200,7 +1202,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1235,7 +1237,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1270,7 +1272,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1289,7 +1291,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1308,7 +1310,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1327,7 +1329,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1346,7 +1348,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1365,7 +1367,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1384,7 +1386,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1412,7 +1414,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1440,7 +1442,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mul.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1483,7 +1485,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulu.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1526,7 +1528,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1557,7 +1559,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1588,7 +1590,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_div0s.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1630,7 +1632,7 @@ if (NEBI (CPU (h_d0bit), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_div0u.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1661,7 +1663,7 @@ if (NEBI (CPU (h_d0bit), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_div1.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1736,7 +1738,7 @@ if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_div2.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1798,7 +1800,7 @@ if (EQSI (tmp_tmp, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_div3.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1821,7 +1823,7 @@ if (EQBI (CPU (h_zbit), 1)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_div4s.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1844,7 +1846,7 @@ if (EQBI (CPU (h_d1bit), 1)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1896,7 +1898,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -1948,7 +1950,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2000,7 +2002,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2052,7 +2054,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2104,7 +2106,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2156,7 +2158,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2208,7 +2210,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2260,7 +2262,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2312,7 +2314,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldi8.f
+#define FLD(f) abuf->fields.sfmt_ldi8.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2331,7 +2333,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldi20.f
+#define FLD(f) abuf->fields.sfmt_ldi20.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -2350,7 +2352,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldi32.f
+#define FLD(f) abuf->fields.sfmt_ldi32.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
@@ -2369,7 +2371,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2388,7 +2390,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2407,7 +2409,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2426,7 +2428,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2445,7 +2447,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2464,7 +2466,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2483,7 +2485,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr14.f
+#define FLD(f) abuf->fields.sfmt_ldr14.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2502,7 +2504,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr14uh.f
+#define FLD(f) abuf->fields.sfmt_ldr14uh.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2521,7 +2523,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr14ub.f
+#define FLD(f) abuf->fields.sfmt_ldr14ub.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2540,7 +2542,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr15.f
+#define FLD(f) abuf->fields.sfmt_ldr15.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2559,7 +2561,7 @@ if (NESI (tmp_shift, 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr15gr.f
+#define FLD(f) abuf->fields.sfmt_ldr15gr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2589,7 +2591,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2617,7 +2619,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldr15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2643,7 +2645,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2662,7 +2664,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2681,7 +2683,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2700,7 +2702,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2719,7 +2721,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2738,7 +2740,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2757,7 +2759,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str14.f
+#define FLD(f) abuf->fields.sfmt_str14.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2776,7 +2778,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str14h.f
+#define FLD(f) abuf->fields.sfmt_str14h.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2795,7 +2797,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str14b.f
+#define FLD(f) abuf->fields.sfmt_str14b.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2814,7 +2816,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str15.f
+#define FLD(f) abuf->fields.sfmt_str15.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2833,7 +2835,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str15gr.f
+#define FLD(f) abuf->fields.sfmt_str15gr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2861,7 +2863,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2889,7 +2891,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_str15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2915,7 +2917,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mov.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2934,7 +2936,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movdr.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2953,7 +2955,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_movps.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2972,7 +2974,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mov2dr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -2991,7 +2993,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_mov2ps.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -3010,7 +3012,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3031,7 +3033,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3054,7 +3056,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3082,7 +3084,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3112,7 +3114,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3126,7 +3128,7 @@ if (NESI (FLD (f_Ri), 15)) {
   }
   {
     USI opval = FLD (i_label12);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 }
@@ -3140,7 +3142,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3155,7 +3157,7 @@ if (NESI (FLD (f_Ri), 15)) {
   }
   {
     USI opval = FLD (i_label12);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 }
@@ -3170,7 +3172,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3191,7 +3193,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3214,7 +3216,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_int.f
+#define FLD(f) abuf->fields.sfmt_int.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3240,7 +3242,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_inte.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3266,7 +3268,7 @@ if (NESI (FLD (f_Ri), 15)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_reti.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3338,7 +3340,7 @@ if (EQBI (GET_H_SBIT (), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3347,7 +3349,7 @@ if (EQBI (GET_H_SBIT (), 0)) {
 {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 }
@@ -3361,7 +3363,7 @@ if (EQBI (GET_H_SBIT (), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3369,7 +3371,7 @@ if (EQBI (GET_H_SBIT (), 0)) {
 
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 
@@ -3382,7 +3384,7 @@ if (EQBI (GET_H_SBIT (), 0)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -3399,7 +3401,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -3414,7 +3416,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3424,7 +3426,7 @@ do { } while (0); /*nop*/
 if (CPU (h_zbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3441,7 +3443,7 @@ if (CPU (h_zbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3450,7 +3452,7 @@ if (CPU (h_zbit)) {
 if (CPU (h_zbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3466,7 +3468,7 @@ if (CPU (h_zbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3476,7 +3478,7 @@ if (CPU (h_zbit)) {
 if (NOTBI (CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3493,7 +3495,7 @@ if (NOTBI (CPU (h_zbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3502,7 +3504,7 @@ if (NOTBI (CPU (h_zbit))) {
 if (NOTBI (CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3518,7 +3520,7 @@ if (NOTBI (CPU (h_zbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3528,7 +3530,7 @@ if (NOTBI (CPU (h_zbit))) {
 if (CPU (h_cbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3545,7 +3547,7 @@ if (CPU (h_cbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3554,7 +3556,7 @@ if (CPU (h_cbit)) {
 if (CPU (h_cbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3570,7 +3572,7 @@ if (CPU (h_cbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3580,7 +3582,7 @@ if (CPU (h_cbit)) {
 if (NOTBI (CPU (h_cbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3597,7 +3599,7 @@ if (NOTBI (CPU (h_cbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3606,7 +3608,7 @@ if (NOTBI (CPU (h_cbit))) {
 if (NOTBI (CPU (h_cbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3622,7 +3624,7 @@ if (NOTBI (CPU (h_cbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3632,7 +3634,7 @@ if (NOTBI (CPU (h_cbit))) {
 if (CPU (h_nbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3649,7 +3651,7 @@ if (CPU (h_nbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3658,7 +3660,7 @@ if (CPU (h_nbit)) {
 if (CPU (h_nbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3674,7 +3676,7 @@ if (CPU (h_nbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3684,7 +3686,7 @@ if (CPU (h_nbit)) {
 if (NOTBI (CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3701,7 +3703,7 @@ if (NOTBI (CPU (h_nbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3710,7 +3712,7 @@ if (NOTBI (CPU (h_nbit))) {
 if (NOTBI (CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3726,7 +3728,7 @@ if (NOTBI (CPU (h_nbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3736,7 +3738,7 @@ if (NOTBI (CPU (h_nbit))) {
 if (CPU (h_vbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3753,7 +3755,7 @@ if (CPU (h_vbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3762,7 +3764,7 @@ if (CPU (h_vbit)) {
 if (CPU (h_vbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3778,7 +3780,7 @@ if (CPU (h_vbit)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3788,7 +3790,7 @@ if (CPU (h_vbit)) {
 if (NOTBI (CPU (h_vbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3805,7 +3807,7 @@ if (NOTBI (CPU (h_vbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3814,7 +3816,7 @@ if (NOTBI (CPU (h_vbit))) {
 if (NOTBI (CPU (h_vbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3830,7 +3832,7 @@ if (NOTBI (CPU (h_vbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3840,7 +3842,7 @@ if (NOTBI (CPU (h_vbit))) {
 if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3857,7 +3859,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3866,7 +3868,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
 if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3882,7 +3884,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3892,7 +3894,7 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
 if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3909,7 +3911,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3918,7 +3920,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
 if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3934,7 +3936,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3944,7 +3946,7 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
 if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3961,7 +3963,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3970,7 +3972,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
 if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3986,7 +3988,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -3996,7 +3998,7 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
 if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4013,7 +4015,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -4022,7 +4024,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
 if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4038,7 +4040,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -4048,7 +4050,7 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
 if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4065,7 +4067,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -4074,7 +4076,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
 if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4090,7 +4092,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -4100,7 +4102,7 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
 if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4117,7 +4119,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   SEM_BRANCH_INIT
@@ -4126,7 +4128,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4142,7 +4144,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4161,7 +4163,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4180,7 +4182,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4199,7 +4201,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4225,7 +4227,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4251,7 +4253,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4277,7 +4279,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmovr15pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4303,7 +4305,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4322,7 +4324,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4341,7 +4343,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4360,7 +4362,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4386,7 +4388,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4412,7 +4414,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4438,7 +4440,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_dmov2r15pd.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4464,7 +4466,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4483,7 +4485,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4502,7 +4504,7 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4517,7 +4519,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4532,7 +4534,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4547,7 +4549,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
@@ -4562,7 +4564,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4577,7 +4579,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4596,7 +4598,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4615,7 +4617,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stilm.f
+#define FLD(f) abuf->fields.sfmt_int.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4634,7 +4636,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_addsp.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4653,7 +4655,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_extsb.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4672,7 +4674,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_extub.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4691,7 +4693,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_extsh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4710,7 +4712,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_extuh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4729,7 +4731,7 @@ do { } while (0); /*nop*/
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldm0.f
+#define FLD(f) abuf->fields.sfmt_ldm0.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -4874,7 +4876,7 @@ if (ANDSI (FLD (f_reglist_low_ld), 128)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_ldm1.f
+#define FLD(f) abuf->fields.sfmt_ldm1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -5011,7 +5013,7 @@ if (ANDSI (FLD (f_reglist_hi_ld), 128)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stm0.f
+#define FLD(f) abuf->fields.sfmt_stm0.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -5156,7 +5158,7 @@ if (ANDSI (FLD (f_reglist_low_st), 128)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_stm1.f
+#define FLD(f) abuf->fields.sfmt_stm1.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -5303,7 +5305,7 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_enter.f
+#define FLD(f) abuf->fields.sfmt_enter.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -5336,7 +5338,7 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_leave.f
+#define FLD(f) abuf->fields.sfmt_enter.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
@@ -5362,7 +5364,7 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) {
 {
   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_xchb.f
+#define FLD(f) abuf->fields.sfmt_add.f
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
diff --git a/sim/fr30/sem.c b/sim/fr30/sem.c
index 40c1936..9d05ecd 100644
--- a/sim/fr30/sem.c
+++ b/sim/fr30/sem.c
@@ -32,9 +32,20 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 #undef GET_ATTR
 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 
+/* This is used so that we can compile two copies of the semantic code,
+   one with full feature support and one without that runs fast(er).
+   FAST_P, when desired, is defined on the command line, -DFAST_P=1.  */
+#if FAST_P
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
+#undef TRACE_RESULT
+#define TRACE_RESULT(cpu, abuf, name, type, val)
+#else
+#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
+#endif
+
 /* x-invalid: --invalid-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -59,7 +70,7 @@ SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-after: --after-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -80,7 +91,7 @@ SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-before: --before-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -101,7 +112,7 @@ SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-cti-chain: --cti-chain-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -114,12 +125,12 @@ SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 #if WITH_SCACHE_PBB_FR30BF
 #ifdef DEFINE_SWITCH
     vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
-			       pbb_br_npc_ptr, pbb_br_npc);
+			       pbb_br_type, pbb_br_npc);
     BREAK (sem);
 #else
     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
     vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
-			       CPU_PBB_BR_NPC_PTR (current_cpu),
+			       CPU_PBB_BR_TYPE (current_cpu),
 			       CPU_PBB_BR_NPC (current_cpu));
 #endif
 #endif
@@ -131,7 +142,7 @@ SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-chain: --chain-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -155,7 +166,7 @@ SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* x-begin: --begin-- */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
 #define FLD(f) abuf->fields.fmt_empty.f
@@ -182,10 +193,10 @@ SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* add: add $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -227,10 +238,10 @@ SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addi: add $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -272,10 +283,10 @@ SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* add2: add2 $m4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -317,10 +328,10 @@ SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addc: addc $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -364,10 +375,10 @@ SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addn: addn $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -385,10 +396,10 @@ SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addni: addn $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addni.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -406,10 +417,10 @@ SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addn2: addn2 $m4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addn2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -427,10 +438,10 @@ SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* sub: sub $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_add.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -472,10 +483,10 @@ SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* subc: subc $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addc.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -519,10 +530,10 @@ SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* subn: subn $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addn.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -540,10 +551,10 @@ SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmp: cmp $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -582,10 +593,10 @@ SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmpi: cmp $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmpi.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -624,10 +635,10 @@ SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* cmp2: cmp2 $m4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_cmp2.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -666,10 +677,10 @@ SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* and: and $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -701,10 +712,10 @@ SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* or: or $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -736,10 +747,10 @@ SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* eor: eor $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_and.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -771,10 +782,10 @@ SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andm: and $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -808,10 +819,10 @@ SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andh: andh $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -845,10 +856,10 @@ SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* andb: andb $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -882,10 +893,10 @@ SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* orm: or $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -919,10 +930,10 @@ SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* orh: orh $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -956,10 +967,10 @@ SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* orb: orb $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -993,10 +1004,10 @@ SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* eorm: eor $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andm.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1030,10 +1041,10 @@ SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* eorh: eorh $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1067,10 +1078,10 @@ SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* eorb: eorb $Rj,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andb.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1104,10 +1115,10 @@ SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bandl: bandl $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1125,10 +1136,10 @@ SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* borl: borl $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1146,10 +1157,10 @@ SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* beorl: beorl $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1167,10 +1178,10 @@ SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bandh: bandh $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1188,10 +1199,10 @@ SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* borh: borh $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1209,10 +1220,10 @@ SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* beorh: beorh $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bandl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1230,10 +1241,10 @@ SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* btstl: btstl $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1260,10 +1271,10 @@ SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* btsth: btsth $u4,@$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_btstl.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1290,10 +1301,10 @@ SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mul: mul $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mul.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1335,10 +1346,10 @@ SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mulu: mulu $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulu.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1380,10 +1391,10 @@ SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mulh: mulh $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1413,10 +1424,10 @@ SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* muluh: muluh $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mulh.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1446,10 +1457,10 @@ SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* div0s: div0s $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,div0s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div0s.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1490,10 +1501,10 @@ if (NEBI (CPU (h_d0bit), 0)) {
 
 /* div0u: div0u $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div0u.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1523,10 +1534,10 @@ SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* div1: div1 $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,div1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div1.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1600,10 +1611,10 @@ if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) {
 
 /* div2: div2 $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,div2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div2.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1664,10 +1675,10 @@ if (EQSI (tmp_tmp, 0)) {
 
 /* div3: div3 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,div3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div3.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1689,10 +1700,10 @@ if (EQBI (CPU (h_zbit), 1)) {
 
 /* div4s: div4s */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,div4s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_div4s.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1714,10 +1725,10 @@ if (EQBI (CPU (h_d1bit), 1)) {
 
 /* lsl: lsl $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1768,10 +1779,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* lsli: lsl $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lsli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1822,10 +1833,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* lsl2: lsl2 $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lsl2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1876,10 +1887,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* lsr: lsr $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1930,10 +1941,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* lsri: lsr $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lsri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -1984,10 +1995,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* lsr2: lsr2 $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lsr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2038,10 +2049,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* asr: asr $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsl.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2092,10 +2103,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* asri: asr $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,asri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2146,10 +2157,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* asr2: asr2 $u4,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,asr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_lsli.f
+#define FLD(f) abuf->fields.sfmt_addi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2200,10 +2211,10 @@ if (NESI (tmp_shift, 0)) {
 
 /* ldi8: ldi:8 $i8,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi8.f
+#define FLD(f) abuf->fields.sfmt_ldi8.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2221,10 +2232,10 @@ SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldi20: ldi:20 $i20,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi20.f
+#define FLD(f) abuf->fields.sfmt_ldi20.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2242,10 +2253,10 @@ SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldi32: ldi:32 $i32,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldi32.f
+#define FLD(f) abuf->fields.sfmt_ldi32.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2263,10 +2274,10 @@ SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ld: ld @$Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2284,10 +2295,10 @@ SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* lduh: lduh @$Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2305,10 +2316,10 @@ SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldub: ldub @$Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ld.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2326,10 +2337,10 @@ SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr13: ld @($R13,$Rj),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2347,10 +2358,10 @@ SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr13uh: lduh @($R13,$Rj),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2368,10 +2379,10 @@ SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr13ub: ldub @($R13,$Rj),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr13.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2389,10 +2400,10 @@ SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr14: ld @($R14,$disp10),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr14.f
+#define FLD(f) abuf->fields.sfmt_ldr14.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2410,10 +2421,10 @@ SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr14uh: lduh @($R14,$disp9),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr14uh.f
+#define FLD(f) abuf->fields.sfmt_ldr14uh.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2431,10 +2442,10 @@ SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr14ub: ldub @($R14,$disp8),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr14ub.f
+#define FLD(f) abuf->fields.sfmt_ldr14ub.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2452,10 +2463,10 @@ SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr15: ld @($R15,$udisp6),$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15.f
+#define FLD(f) abuf->fields.sfmt_ldr15.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2473,10 +2484,10 @@ SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr15gr: ld @$R15+,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15gr.f
+#define FLD(f) abuf->fields.sfmt_ldr15gr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2505,10 +2516,10 @@ if (NESI (FLD (f_Ri), 15)) {
 
 /* ldr15dr: ld @$R15+,$Rs2 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2535,10 +2546,10 @@ SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldr15ps: ld @$R15+,$ps */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldr15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2563,10 +2574,10 @@ SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* st: st $Ri,@$Rj */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2584,10 +2595,10 @@ SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* sth: sth $Ri,@$Rj */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2605,10 +2616,10 @@ SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stb: stb $Ri,@$Rj */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_st.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2626,10 +2637,10 @@ SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str13: st $Ri,@($R13,$Rj) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2647,10 +2658,10 @@ SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str13h: sth $Ri,@($R13,$Rj) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2668,10 +2679,10 @@ SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str13b: stb $Ri,@($R13,$Rj) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str13.f
+#define FLD(f) abuf->fields.sfmt_str13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2689,10 +2700,10 @@ SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str14: st $Ri,@($R14,$disp10) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str14.f
+#define FLD(f) abuf->fields.sfmt_str14.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2710,10 +2721,10 @@ SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str14h: sth $Ri,@($R14,$disp9) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str14h.f
+#define FLD(f) abuf->fields.sfmt_str14h.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2731,10 +2742,10 @@ SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str14b: stb $Ri,@($R14,$disp8) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str14b.f
+#define FLD(f) abuf->fields.sfmt_str14b.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2752,10 +2763,10 @@ SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str15: st $Ri,@($R15,$udisp6) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15.f
+#define FLD(f) abuf->fields.sfmt_str15.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2773,10 +2784,10 @@ SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str15gr: st $Ri,@-$R15 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15gr.f
+#define FLD(f) abuf->fields.sfmt_str15gr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2803,10 +2814,10 @@ SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str15dr: st $Rs2,@-$R15 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15dr.f
+#define FLD(f) abuf->fields.sfmt_ldr15dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2833,10 +2844,10 @@ SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* str15ps: st $ps,@-$R15 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_str15ps.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2861,10 +2872,10 @@ SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mov: mov $Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mov.f
+#define FLD(f) abuf->fields.sfmt_ldr13.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2882,10 +2893,10 @@ SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movdr: mov $Rs1,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movdr.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2903,10 +2914,10 @@ SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* movps: mov $ps,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_movps.f
+#define FLD(f) abuf->fields.sfmt_movdr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2924,10 +2935,10 @@ SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mov2dr: mov $Ri,$Rs1 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mov2dr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2945,10 +2956,10 @@ SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* mov2ps: mov $Ri,$ps */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_mov2ps.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2966,10 +2977,10 @@ SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* jmp: jmp @$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -2989,10 +3000,10 @@ SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* jmpd: jmp:d @$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3014,10 +3025,10 @@ SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* callr: call @$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3044,10 +3055,10 @@ SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* callrd: call:d @$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
+#define FLD(f) abuf->fields.sfmt_mov2dr.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3076,10 +3087,10 @@ SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* call: call $label12 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3094,7 +3105,7 @@ SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
   }
   {
     USI opval = FLD (i_label12);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 }
@@ -3106,10 +3117,10 @@ SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* calld: call:d $label12 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_call.f
+#define FLD(f) abuf->fields.sfmt_call.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3125,7 +3136,7 @@ SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
   }
   {
     USI opval = FLD (i_label12);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 }
@@ -3138,10 +3149,10 @@ SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ret: ret */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3161,10 +3172,10 @@ SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ret:d: ret:d */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3186,10 +3197,10 @@ SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* int: int $u8 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_int.f
+#define FLD(f) abuf->fields.sfmt_int.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3214,10 +3225,10 @@ SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* inte: inte */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_inte.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3242,10 +3253,10 @@ SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* reti: reti */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,reti) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_reti.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3316,10 +3327,10 @@ if (EQBI (GET_H_SBIT (), 0)) {
 
 /* brad: bra:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3329,7 +3340,7 @@ SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 }
@@ -3341,10 +3352,10 @@ SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bra: bra $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3353,7 +3364,7 @@ SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
 
@@ -3364,10 +3375,10 @@ SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* bnod: bno:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3383,10 +3394,10 @@ do { } while (0); /*nop*/
 
 /* bno: bno $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3400,10 +3411,10 @@ do { } while (0); /*nop*/
 
 /* beqd: beq:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3414,7 +3425,7 @@ SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_zbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3429,10 +3440,10 @@ if (CPU (h_zbit)) {
 
 /* beq: beq $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3442,7 +3453,7 @@ SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_zbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3456,10 +3467,10 @@ if (CPU (h_zbit)) {
 
 /* bned: bne:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3470,7 +3481,7 @@ SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3485,10 +3496,10 @@ if (NOTBI (CPU (h_zbit))) {
 
 /* bne: bne $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3498,7 +3509,7 @@ SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3512,10 +3523,10 @@ if (NOTBI (CPU (h_zbit))) {
 
 /* bcd: bc:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3526,7 +3537,7 @@ SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_cbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3541,10 +3552,10 @@ if (CPU (h_cbit)) {
 
 /* bc: bc $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3554,7 +3565,7 @@ SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_cbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3568,10 +3579,10 @@ if (CPU (h_cbit)) {
 
 /* bncd: bnc:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3582,7 +3593,7 @@ SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_cbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3597,10 +3608,10 @@ if (NOTBI (CPU (h_cbit))) {
 
 /* bnc: bnc $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3610,7 +3621,7 @@ SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_cbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3624,10 +3635,10 @@ if (NOTBI (CPU (h_cbit))) {
 
 /* bnd: bn:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3638,7 +3649,7 @@ SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_nbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3653,10 +3664,10 @@ if (CPU (h_nbit)) {
 
 /* bn: bn $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3666,7 +3677,7 @@ SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_nbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3680,10 +3691,10 @@ if (CPU (h_nbit)) {
 
 /* bpd: bp:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3694,7 +3705,7 @@ SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3709,10 +3720,10 @@ if (NOTBI (CPU (h_nbit))) {
 
 /* bp: bp $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3722,7 +3733,7 @@ SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3736,10 +3747,10 @@ if (NOTBI (CPU (h_nbit))) {
 
 /* bvd: bv:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3750,7 +3761,7 @@ SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_vbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3765,10 +3776,10 @@ if (CPU (h_vbit)) {
 
 /* bv: bv $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3778,7 +3789,7 @@ SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (CPU (h_vbit)) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3792,10 +3803,10 @@ if (CPU (h_vbit)) {
 
 /* bnvd: bnv:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3806,7 +3817,7 @@ SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_vbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3821,10 +3832,10 @@ if (NOTBI (CPU (h_vbit))) {
 
 /* bnv: bnv $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3834,7 +3845,7 @@ SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (CPU (h_vbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 2);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3848,10 +3859,10 @@ if (NOTBI (CPU (h_vbit))) {
 
 /* bltd: blt:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3862,7 +3873,7 @@ SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3877,10 +3888,10 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
 
 /* blt: blt $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3890,7 +3901,7 @@ SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3904,10 +3915,10 @@ if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
 
 /* bged: bge:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3918,7 +3929,7 @@ SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3933,10 +3944,10 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
 
 /* bge: bge $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3946,7 +3957,7 @@ SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3960,10 +3971,10 @@ if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
 
 /* bled: ble:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -3974,7 +3985,7 @@ SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -3989,10 +4000,10 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
 
 /* ble: ble $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4002,7 +4013,7 @@ SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4016,10 +4027,10 @@ if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
 
 /* bgtd: bgt:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4030,7 +4041,7 @@ SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4045,10 +4056,10 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
 
 /* bgt: bgt $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4058,7 +4069,7 @@ SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 4);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4072,10 +4083,10 @@ if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
 
 /* blsd: bls:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4086,7 +4097,7 @@ SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4101,10 +4112,10 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
 
 /* bls: bls $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4114,7 +4125,7 @@ SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4128,10 +4139,10 @@ if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
 
 /* bhid: bhi:d $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4142,7 +4153,7 @@ SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4157,10 +4168,10 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 
 /* bhi: bhi $label9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
+#define FLD(f) abuf->fields.sfmt_brad.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4170,7 +4181,7 @@ SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
   {
     USI opval = FLD (i_label9);
-    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
+    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
     written |= (1 << 3);
     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
   }
@@ -4184,10 +4195,10 @@ if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
 
 /* dmovr13: dmov $R13,@$dir10 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4205,10 +4216,10 @@ SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmovr13h: dmovh $R13,@$dir9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4226,10 +4237,10 @@ SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmovr13b: dmovb $R13,@$dir8 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4247,10 +4258,10 @@ SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmovr13pi: dmov @$R13+,@$dir10 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4275,10 +4286,10 @@ SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmovr13pih: dmovh @$R13+,@$dir9 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4303,10 +4314,10 @@ SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmovr13pib: dmovb @$R13+,@$dir8 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4331,10 +4342,10 @@ SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmovr15pi: dmov @$R15+,@$dir10 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmovr15pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4359,10 +4370,10 @@ SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r13: dmov @$dir10,$R13 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4380,10 +4391,10 @@ SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r13h: dmovh @$dir9,$R13 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13h.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4401,10 +4412,10 @@ SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r13b: dmovb @$dir8,$R13 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13b.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4422,10 +4433,10 @@ SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r13pi: dmov @$dir10,@$R13+ */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13pi.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4450,10 +4461,10 @@ SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r13pih: dmovh @$dir9,@$R13+ */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13pih.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4478,10 +4489,10 @@ SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r13pib: dmovb @$dir8,@$R13+ */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r13pib.f
+#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4506,10 +4517,10 @@ SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* dmov2r15pd: dmov @$dir10,@-$R15 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_dmov2r15pd.f
+#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4534,10 +4545,10 @@ SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldres: ldres @$Ri+,$u4 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4555,10 +4566,10 @@ SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stres: stres $u4,@$Ri+ */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldres.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4576,10 +4587,10 @@ SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* copop: copop $u4c,$ccc,$CRj,$CRi */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4593,10 +4604,10 @@ do { } while (0); /*nop*/
 
 /* copld: copld $u4c,$ccc,$Rjc,$CRi */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4610,10 +4621,10 @@ do { } while (0); /*nop*/
 
 /* copst: copst $u4c,$ccc,$CRj,$Ric */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4627,10 +4638,10 @@ do { } while (0); /*nop*/
 
 /* copsv: copsv $u4c,$ccc,$CRj,$Ric */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_copop.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4644,10 +4655,10 @@ do { } while (0); /*nop*/
 
 /* nop: nop */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_bnod.f
+#define FLD(f) abuf->fields.fmt_empty.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4661,10 +4672,10 @@ do { } while (0); /*nop*/
 
 /* andccr: andccr $u8 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4682,10 +4693,10 @@ SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* orccr: orccr $u8 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_andccr.f
+#define FLD(f) abuf->fields.sfmt_int.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4703,10 +4714,10 @@ SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* stilm: stilm $u8 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stilm.f
+#define FLD(f) abuf->fields.sfmt_int.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4724,10 +4735,10 @@ SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* addsp: addsp $s10 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_addsp.f
+#define FLD(f) abuf->fields.sfmt_addsp.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4745,10 +4756,10 @@ SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* extsb: extsb $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extsb.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4766,10 +4777,10 @@ SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* extub: extub $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extub.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4787,10 +4798,10 @@ SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* extsh: extsh $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extsh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4808,10 +4819,10 @@ SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* extuh: extuh $Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_extuh.f
+#define FLD(f) abuf->fields.sfmt_add2.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4829,10 +4840,10 @@ SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* ldm0: ldm0 ($reglist_low_ld) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldm0.f
+#define FLD(f) abuf->fields.sfmt_ldm0.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -4976,10 +4987,10 @@ if (ANDSI (FLD (f_reglist_low_ld), 128)) {
 
 /* ldm1: ldm1 ($reglist_hi_ld) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,ldm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_ldm1.f
+#define FLD(f) abuf->fields.sfmt_ldm1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5115,10 +5126,10 @@ if (ANDSI (FLD (f_reglist_hi_ld), 128)) {
 
 /* stm0: stm0 ($reglist_low_st) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,stm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stm0.f
+#define FLD(f) abuf->fields.sfmt_stm0.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5262,10 +5273,10 @@ if (ANDSI (FLD (f_reglist_low_st), 128)) {
 
 /* stm1: stm1 ($reglist_hi_st) */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,stm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_stm1.f
+#define FLD(f) abuf->fields.sfmt_stm1.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5411,10 +5422,10 @@ if (ANDSI (FLD (f_reglist_hi_st), 128)) {
 
 /* enter: enter $u10 */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_enter.f
+#define FLD(f) abuf->fields.sfmt_enter.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5446,10 +5457,10 @@ SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* leave: leave */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_leave.f
+#define FLD(f) abuf->fields.sfmt_enter.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5474,10 +5485,10 @@ SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 /* xchb: xchb @$Rj,$Ri */
 
-SEM_PC
+static SEM_PC
 SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 {
-#define FLD(f) abuf->fields.fmt_xchb.f
+#define FLD(f) abuf->fields.sfmt_add.f
   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
   int UNUSED written = 0;
   IADDR UNUSED pc = abuf->addr;
@@ -5502,3 +5513,198 @@ SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 #undef FLD
 }
 
+/* Table of all semantic fns.  */
+
+static const struct sem_fn_desc sem_fns[] = {
+  { FR30BF_INSN_X_INVALID, SEM_FN_NAME (fr30bf,x_invalid) },
+  { FR30BF_INSN_X_AFTER, SEM_FN_NAME (fr30bf,x_after) },
+  { FR30BF_INSN_X_BEFORE, SEM_FN_NAME (fr30bf,x_before) },
+  { FR30BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (fr30bf,x_cti_chain) },
+  { FR30BF_INSN_X_CHAIN, SEM_FN_NAME (fr30bf,x_chain) },
+  { FR30BF_INSN_X_BEGIN, SEM_FN_NAME (fr30bf,x_begin) },
+  { FR30BF_INSN_ADD, SEM_FN_NAME (fr30bf,add) },
+  { FR30BF_INSN_ADDI, SEM_FN_NAME (fr30bf,addi) },
+  { FR30BF_INSN_ADD2, SEM_FN_NAME (fr30bf,add2) },
+  { FR30BF_INSN_ADDC, SEM_FN_NAME (fr30bf,addc) },
+  { FR30BF_INSN_ADDN, SEM_FN_NAME (fr30bf,addn) },
+  { FR30BF_INSN_ADDNI, SEM_FN_NAME (fr30bf,addni) },
+  { FR30BF_INSN_ADDN2, SEM_FN_NAME (fr30bf,addn2) },
+  { FR30BF_INSN_SUB, SEM_FN_NAME (fr30bf,sub) },
+  { FR30BF_INSN_SUBC, SEM_FN_NAME (fr30bf,subc) },
+  { FR30BF_INSN_SUBN, SEM_FN_NAME (fr30bf,subn) },
+  { FR30BF_INSN_CMP, SEM_FN_NAME (fr30bf,cmp) },
+  { FR30BF_INSN_CMPI, SEM_FN_NAME (fr30bf,cmpi) },
+  { FR30BF_INSN_CMP2, SEM_FN_NAME (fr30bf,cmp2) },
+  { FR30BF_INSN_AND, SEM_FN_NAME (fr30bf,and) },
+  { FR30BF_INSN_OR, SEM_FN_NAME (fr30bf,or) },
+  { FR30BF_INSN_EOR, SEM_FN_NAME (fr30bf,eor) },
+  { FR30BF_INSN_ANDM, SEM_FN_NAME (fr30bf,andm) },
+  { FR30BF_INSN_ANDH, SEM_FN_NAME (fr30bf,andh) },
+  { FR30BF_INSN_ANDB, SEM_FN_NAME (fr30bf,andb) },
+  { FR30BF_INSN_ORM, SEM_FN_NAME (fr30bf,orm) },
+  { FR30BF_INSN_ORH, SEM_FN_NAME (fr30bf,orh) },
+  { FR30BF_INSN_ORB, SEM_FN_NAME (fr30bf,orb) },
+  { FR30BF_INSN_EORM, SEM_FN_NAME (fr30bf,eorm) },
+  { FR30BF_INSN_EORH, SEM_FN_NAME (fr30bf,eorh) },
+  { FR30BF_INSN_EORB, SEM_FN_NAME (fr30bf,eorb) },
+  { FR30BF_INSN_BANDL, SEM_FN_NAME (fr30bf,bandl) },
+  { FR30BF_INSN_BORL, SEM_FN_NAME (fr30bf,borl) },
+  { FR30BF_INSN_BEORL, SEM_FN_NAME (fr30bf,beorl) },
+  { FR30BF_INSN_BANDH, SEM_FN_NAME (fr30bf,bandh) },
+  { FR30BF_INSN_BORH, SEM_FN_NAME (fr30bf,borh) },
+  { FR30BF_INSN_BEORH, SEM_FN_NAME (fr30bf,beorh) },
+  { FR30BF_INSN_BTSTL, SEM_FN_NAME (fr30bf,btstl) },
+  { FR30BF_INSN_BTSTH, SEM_FN_NAME (fr30bf,btsth) },
+  { FR30BF_INSN_MUL, SEM_FN_NAME (fr30bf,mul) },
+  { FR30BF_INSN_MULU, SEM_FN_NAME (fr30bf,mulu) },
+  { FR30BF_INSN_MULH, SEM_FN_NAME (fr30bf,mulh) },
+  { FR30BF_INSN_MULUH, SEM_FN_NAME (fr30bf,muluh) },
+  { FR30BF_INSN_DIV0S, SEM_FN_NAME (fr30bf,div0s) },
+  { FR30BF_INSN_DIV0U, SEM_FN_NAME (fr30bf,div0u) },
+  { FR30BF_INSN_DIV1, SEM_FN_NAME (fr30bf,div1) },
+  { FR30BF_INSN_DIV2, SEM_FN_NAME (fr30bf,div2) },
+  { FR30BF_INSN_DIV3, SEM_FN_NAME (fr30bf,div3) },
+  { FR30BF_INSN_DIV4S, SEM_FN_NAME (fr30bf,div4s) },
+  { FR30BF_INSN_LSL, SEM_FN_NAME (fr30bf,lsl) },
+  { FR30BF_INSN_LSLI, SEM_FN_NAME (fr30bf,lsli) },
+  { FR30BF_INSN_LSL2, SEM_FN_NAME (fr30bf,lsl2) },
+  { FR30BF_INSN_LSR, SEM_FN_NAME (fr30bf,lsr) },
+  { FR30BF_INSN_LSRI, SEM_FN_NAME (fr30bf,lsri) },
+  { FR30BF_INSN_LSR2, SEM_FN_NAME (fr30bf,lsr2) },
+  { FR30BF_INSN_ASR, SEM_FN_NAME (fr30bf,asr) },
+  { FR30BF_INSN_ASRI, SEM_FN_NAME (fr30bf,asri) },
+  { FR30BF_INSN_ASR2, SEM_FN_NAME (fr30bf,asr2) },
+  { FR30BF_INSN_LDI8, SEM_FN_NAME (fr30bf,ldi8) },
+  { FR30BF_INSN_LDI20, SEM_FN_NAME (fr30bf,ldi20) },
+  { FR30BF_INSN_LDI32, SEM_FN_NAME (fr30bf,ldi32) },
+  { FR30BF_INSN_LD, SEM_FN_NAME (fr30bf,ld) },
+  { FR30BF_INSN_LDUH, SEM_FN_NAME (fr30bf,lduh) },
+  { FR30BF_INSN_LDUB, SEM_FN_NAME (fr30bf,ldub) },
+  { FR30BF_INSN_LDR13, SEM_FN_NAME (fr30bf,ldr13) },
+  { FR30BF_INSN_LDR13UH, SEM_FN_NAME (fr30bf,ldr13uh) },
+  { FR30BF_INSN_LDR13UB, SEM_FN_NAME (fr30bf,ldr13ub) },
+  { FR30BF_INSN_LDR14, SEM_FN_NAME (fr30bf,ldr14) },
+  { FR30BF_INSN_LDR14UH, SEM_FN_NAME (fr30bf,ldr14uh) },
+  { FR30BF_INSN_LDR14UB, SEM_FN_NAME (fr30bf,ldr14ub) },
+  { FR30BF_INSN_LDR15, SEM_FN_NAME (fr30bf,ldr15) },
+  { FR30BF_INSN_LDR15GR, SEM_FN_NAME (fr30bf,ldr15gr) },
+  { FR30BF_INSN_LDR15DR, SEM_FN_NAME (fr30bf,ldr15dr) },
+  { FR30BF_INSN_LDR15PS, SEM_FN_NAME (fr30bf,ldr15ps) },
+  { FR30BF_INSN_ST, SEM_FN_NAME (fr30bf,st) },
+  { FR30BF_INSN_STH, SEM_FN_NAME (fr30bf,sth) },
+  { FR30BF_INSN_STB, SEM_FN_NAME (fr30bf,stb) },
+  { FR30BF_INSN_STR13, SEM_FN_NAME (fr30bf,str13) },
+  { FR30BF_INSN_STR13H, SEM_FN_NAME (fr30bf,str13h) },
+  { FR30BF_INSN_STR13B, SEM_FN_NAME (fr30bf,str13b) },
+  { FR30BF_INSN_STR14, SEM_FN_NAME (fr30bf,str14) },
+  { FR30BF_INSN_STR14H, SEM_FN_NAME (fr30bf,str14h) },
+  { FR30BF_INSN_STR14B, SEM_FN_NAME (fr30bf,str14b) },
+  { FR30BF_INSN_STR15, SEM_FN_NAME (fr30bf,str15) },
+  { FR30BF_INSN_STR15GR, SEM_FN_NAME (fr30bf,str15gr) },
+  { FR30BF_INSN_STR15DR, SEM_FN_NAME (fr30bf,str15dr) },
+  { FR30BF_INSN_STR15PS, SEM_FN_NAME (fr30bf,str15ps) },
+  { FR30BF_INSN_MOV, SEM_FN_NAME (fr30bf,mov) },
+  { FR30BF_INSN_MOVDR, SEM_FN_NAME (fr30bf,movdr) },
+  { FR30BF_INSN_MOVPS, SEM_FN_NAME (fr30bf,movps) },
+  { FR30BF_INSN_MOV2DR, SEM_FN_NAME (fr30bf,mov2dr) },
+  { FR30BF_INSN_MOV2PS, SEM_FN_NAME (fr30bf,mov2ps) },
+  { FR30BF_INSN_JMP, SEM_FN_NAME (fr30bf,jmp) },
+  { FR30BF_INSN_JMPD, SEM_FN_NAME (fr30bf,jmpd) },
+  { FR30BF_INSN_CALLR, SEM_FN_NAME (fr30bf,callr) },
+  { FR30BF_INSN_CALLRD, SEM_FN_NAME (fr30bf,callrd) },
+  { FR30BF_INSN_CALL, SEM_FN_NAME (fr30bf,call) },
+  { FR30BF_INSN_CALLD, SEM_FN_NAME (fr30bf,calld) },
+  { FR30BF_INSN_RET, SEM_FN_NAME (fr30bf,ret) },
+  { FR30BF_INSN_RET_D, SEM_FN_NAME (fr30bf,ret_d) },
+  { FR30BF_INSN_INT, SEM_FN_NAME (fr30bf,int) },
+  { FR30BF_INSN_INTE, SEM_FN_NAME (fr30bf,inte) },
+  { FR30BF_INSN_RETI, SEM_FN_NAME (fr30bf,reti) },
+  { FR30BF_INSN_BRAD, SEM_FN_NAME (fr30bf,brad) },
+  { FR30BF_INSN_BRA, SEM_FN_NAME (fr30bf,bra) },
+  { FR30BF_INSN_BNOD, SEM_FN_NAME (fr30bf,bnod) },
+  { FR30BF_INSN_BNO, SEM_FN_NAME (fr30bf,bno) },
+  { FR30BF_INSN_BEQD, SEM_FN_NAME (fr30bf,beqd) },
+  { FR30BF_INSN_BEQ, SEM_FN_NAME (fr30bf,beq) },
+  { FR30BF_INSN_BNED, SEM_FN_NAME (fr30bf,bned) },
+  { FR30BF_INSN_BNE, SEM_FN_NAME (fr30bf,bne) },
+  { FR30BF_INSN_BCD, SEM_FN_NAME (fr30bf,bcd) },
+  { FR30BF_INSN_BC, SEM_FN_NAME (fr30bf,bc) },
+  { FR30BF_INSN_BNCD, SEM_FN_NAME (fr30bf,bncd) },
+  { FR30BF_INSN_BNC, SEM_FN_NAME (fr30bf,bnc) },
+  { FR30BF_INSN_BND, SEM_FN_NAME (fr30bf,bnd) },
+  { FR30BF_INSN_BN, SEM_FN_NAME (fr30bf,bn) },
+  { FR30BF_INSN_BPD, SEM_FN_NAME (fr30bf,bpd) },
+  { FR30BF_INSN_BP, SEM_FN_NAME (fr30bf,bp) },
+  { FR30BF_INSN_BVD, SEM_FN_NAME (fr30bf,bvd) },
+  { FR30BF_INSN_BV, SEM_FN_NAME (fr30bf,bv) },
+  { FR30BF_INSN_BNVD, SEM_FN_NAME (fr30bf,bnvd) },
+  { FR30BF_INSN_BNV, SEM_FN_NAME (fr30bf,bnv) },
+  { FR30BF_INSN_BLTD, SEM_FN_NAME (fr30bf,bltd) },
+  { FR30BF_INSN_BLT, SEM_FN_NAME (fr30bf,blt) },
+  { FR30BF_INSN_BGED, SEM_FN_NAME (fr30bf,bged) },
+  { FR30BF_INSN_BGE, SEM_FN_NAME (fr30bf,bge) },
+  { FR30BF_INSN_BLED, SEM_FN_NAME (fr30bf,bled) },
+  { FR30BF_INSN_BLE, SEM_FN_NAME (fr30bf,ble) },
+  { FR30BF_INSN_BGTD, SEM_FN_NAME (fr30bf,bgtd) },
+  { FR30BF_INSN_BGT, SEM_FN_NAME (fr30bf,bgt) },
+  { FR30BF_INSN_BLSD, SEM_FN_NAME (fr30bf,blsd) },
+  { FR30BF_INSN_BLS, SEM_FN_NAME (fr30bf,bls) },
+  { FR30BF_INSN_BHID, SEM_FN_NAME (fr30bf,bhid) },
+  { FR30BF_INSN_BHI, SEM_FN_NAME (fr30bf,bhi) },
+  { FR30BF_INSN_DMOVR13, SEM_FN_NAME (fr30bf,dmovr13) },
+  { FR30BF_INSN_DMOVR13H, SEM_FN_NAME (fr30bf,dmovr13h) },
+  { FR30BF_INSN_DMOVR13B, SEM_FN_NAME (fr30bf,dmovr13b) },
+  { FR30BF_INSN_DMOVR13PI, SEM_FN_NAME (fr30bf,dmovr13pi) },
+  { FR30BF_INSN_DMOVR13PIH, SEM_FN_NAME (fr30bf,dmovr13pih) },
+  { FR30BF_INSN_DMOVR13PIB, SEM_FN_NAME (fr30bf,dmovr13pib) },
+  { FR30BF_INSN_DMOVR15PI, SEM_FN_NAME (fr30bf,dmovr15pi) },
+  { FR30BF_INSN_DMOV2R13, SEM_FN_NAME (fr30bf,dmov2r13) },
+  { FR30BF_INSN_DMOV2R13H, SEM_FN_NAME (fr30bf,dmov2r13h) },
+  { FR30BF_INSN_DMOV2R13B, SEM_FN_NAME (fr30bf,dmov2r13b) },
+  { FR30BF_INSN_DMOV2R13PI, SEM_FN_NAME (fr30bf,dmov2r13pi) },
+  { FR30BF_INSN_DMOV2R13PIH, SEM_FN_NAME (fr30bf,dmov2r13pih) },
+  { FR30BF_INSN_DMOV2R13PIB, SEM_FN_NAME (fr30bf,dmov2r13pib) },
+  { FR30BF_INSN_DMOV2R15PD, SEM_FN_NAME (fr30bf,dmov2r15pd) },
+  { FR30BF_INSN_LDRES, SEM_FN_NAME (fr30bf,ldres) },
+  { FR30BF_INSN_STRES, SEM_FN_NAME (fr30bf,stres) },
+  { FR30BF_INSN_COPOP, SEM_FN_NAME (fr30bf,copop) },
+  { FR30BF_INSN_COPLD, SEM_FN_NAME (fr30bf,copld) },
+  { FR30BF_INSN_COPST, SEM_FN_NAME (fr30bf,copst) },
+  { FR30BF_INSN_COPSV, SEM_FN_NAME (fr30bf,copsv) },
+  { FR30BF_INSN_NOP, SEM_FN_NAME (fr30bf,nop) },
+  { FR30BF_INSN_ANDCCR, SEM_FN_NAME (fr30bf,andccr) },
+  { FR30BF_INSN_ORCCR, SEM_FN_NAME (fr30bf,orccr) },
+  { FR30BF_INSN_STILM, SEM_FN_NAME (fr30bf,stilm) },
+  { FR30BF_INSN_ADDSP, SEM_FN_NAME (fr30bf,addsp) },
+  { FR30BF_INSN_EXTSB, SEM_FN_NAME (fr30bf,extsb) },
+  { FR30BF_INSN_EXTUB, SEM_FN_NAME (fr30bf,extub) },
+  { FR30BF_INSN_EXTSH, SEM_FN_NAME (fr30bf,extsh) },
+  { FR30BF_INSN_EXTUH, SEM_FN_NAME (fr30bf,extuh) },
+  { FR30BF_INSN_LDM0, SEM_FN_NAME (fr30bf,ldm0) },
+  { FR30BF_INSN_LDM1, SEM_FN_NAME (fr30bf,ldm1) },
+  { FR30BF_INSN_STM0, SEM_FN_NAME (fr30bf,stm0) },
+  { FR30BF_INSN_STM1, SEM_FN_NAME (fr30bf,stm1) },
+  { FR30BF_INSN_ENTER, SEM_FN_NAME (fr30bf,enter) },
+  { FR30BF_INSN_LEAVE, SEM_FN_NAME (fr30bf,leave) },
+  { FR30BF_INSN_XCHB, SEM_FN_NAME (fr30bf,xchb) },
+  { 0, 0 }
+};
+
+/* Add the semantic fns to IDESC_TABLE.  */
+
+void
+SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu)
+{
+  IDESC *idesc_table = CPU_IDESC (current_cpu);
+  const struct sem_fn_desc *sf;
+
+  for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
+    {
+#if FAST_P
+      idesc_table[sf->index].sem_fast = sf->fn;
+#else
+      idesc_table[sf->index].sem_full = sf->fn;
+#endif
+    }
+}
+