Initial creation of sourceware repositorygdb-4_18-branchpoint

1 files changed, 70 insertions, 0 deletions

diff --git a/sim/fr30/sim-main.h b/sim/fr30/sim-main.h
new file mode 100644
index 0000000..8cbf085
--- /dev/null
+++ b/sim/fr30/sim-main.h
@@ -0,0 +1,70 @@
+/* Main header for the fr30.  */
+
+#define USING_SIM_BASE_H /* FIXME: quick hack */
+
+struct _sim_cpu; /* FIXME: should be in sim-basics.h */
+typedef struct _sim_cpu SIM_CPU;
+
+/* sim-basics.h includes config.h but cgen-types.h must be included before
+   sim-basics.h and cgen-types.h needs config.h.  */
+#include "config.h"
+
+#include "symcat.h"
+#include "sim-basics.h"
+#include "cgen-types.h"
+#include "fr30-desc.h"
+#include "fr30-opc.h"
+#include "arch.h"
+
+/* These must be defined before sim-base.h.  */
+typedef USI sim_cia;
+
+#define CIA_GET(cpu)     CPU_PC_GET (cpu)
+#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
+
+#include "sim-base.h"
+#include "cgen-sim.h"
+#include "fr30-sim.h"
+
+/* The _sim_cpu struct.  */
+
+struct _sim_cpu {
+  /* sim/common cpu base.  */
+  sim_cpu_base base;
+
+  /* Static parts of cgen.  */
+  CGEN_CPU cgen_cpu;
+
+  /* CPU specific parts go here.
+     Note that in files that don't need to access these pieces WANT_CPU_FOO
+     won't be defined and thus these parts won't appear.  This is ok in the
+     sense that things work.  It is a source of bugs though.
+     One has to of course be careful to not take the size of this
+     struct and no structure members accessed in non-cpu specific files can
+     go after here.  Oh for a better language.  */
+#if defined (WANT_CPU_FR30BF)
+  FR30BF_CPU_DATA cpu_data;
+#endif
+};
+
+/* The sim_state struct.  */
+
+struct sim_state {
+  sim_cpu *cpu;
+#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
+
+  CGEN_STATE cgen_state;
+
+  sim_state_base base;
+};
+
+/* Misc.  */
+
+/* Catch address exceptions.  */
+extern SIM_CORE_SIGNAL_FN fr30_core_signal;
+#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
+fr30_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
+		  (TRANSFER), (ERROR))
+
+/* Default memory size.  */
+#define FR30_DEFAULT_MEM_SIZE 0x800000 /* 8M */