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| author | Mike Frysinger <vapier@gentoo.org> | 2021-06-14 23:25:01 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-06-14 23:30:17 -0400 |
| commit | 757b3c2fea905abfd487dd159c7e0550169ed966 (patch) | |
| tree | d1a5472f34798307e0c70420eb1b63b334444418 /sim/erc32 | |
| parent | 4df5cdbd3afc33e8c0a0d18542899f3f88d2f22f (diff) | |
| download | gdb-757b3c2fea905abfd487dd159c7e0550169ed966.zip gdb-757b3c2fea905abfd487dd159c7e0550169ed966.tar.gz gdb-757b3c2fea905abfd487dd159c7e0550169ed966.tar.bz2 | |
sim: erc32: fix build w/out F_{G,S}ETFL
Add conditional logic around fcntl.h F_{G,S}ETFL usage to fix builds
on systems that don't have it (e.g. Windows). The code is only used
to save & restore limited terminal stdin state.
Diffstat (limited to 'sim/erc32')
| -rw-r--r-- | sim/erc32/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/erc32/interf.c | 7 | ||||
| -rw-r--r-- | sim/erc32/sis.c | 2 |
3 files changed, 13 insertions, 2 deletions
diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog index a5035d0..0a82427 100644 --- a/sim/erc32/ChangeLog +++ b/sim/erc32/ChangeLog @@ -1,5 +1,11 @@ 2021-06-14 Mike Frysinger <vapier@gentoo.org> + * interf.c (sim_open) [F_GETFL]: Only set termsave. + (sim_close) [F_SETFL]: Only call fcntl. + * sis.c (main) [F_GETFL]: Only set termsave. + +2021-06-14 Mike Frysinger <vapier@gentoo.org> + * erc32.c [HAVE_TERMIOS_H]: Include termios.h and declare ioc1, ioc2, iocold1, & iocold2. (init_stdio) [HAVE_TERMIOS_H]: Only call tcsetattr. diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c index 28c981b..0cd6555 100644 --- a/sim/erc32/interf.c +++ b/sim/erc32/interf.c @@ -241,7 +241,9 @@ sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback, } sregs.freq = freq ? freq : 15; +#ifdef F_GETFL termsave = fcntl(0, F_GETFL, 0); +#endif INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf); #ifdef HOST_LITTLE_ENDIAN dinfo.endian = BFD_ENDIAN_LITTLE; @@ -263,9 +265,10 @@ sim_close(SIM_DESC sd, int quitting) { exit_sim(); +#ifdef F_SETFL fcntl(0, F_SETFL, termsave); - -}; +#endif +} SIM_RC sim_load(SIM_DESC sd, const char *prog, bfd *abfd, int from_tty) diff --git a/sim/erc32/sis.c b/sim/erc32/sis.c index 749d256..b49e5a6 100644 --- a/sim/erc32/sis.c +++ b/sim/erc32/sis.c @@ -219,7 +219,9 @@ main(int argc, char **argv) dinfo.endian = BFD_ENDIAN_BIG; #endif +#ifdef F_GETFL termsave = fcntl(0, F_GETFL, 0); +#endif using_history(); init_signals(); ebase.simtime = 0; |