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author | Jiri Gaisler <jiri@gaisler.se> | 2015-04-03 22:35:48 +0200 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2015-04-19 02:29:44 -0400 |
commit | d3e9b40afb8e7bd09522044951cdce4710676c3e (patch) | |
tree | 23020a66ff49d500c422b506c5891c998089e64b /sim/erc32/sis.h | |
parent | 09b29ece9abb652983d4718aac0ff666d62d6790 (diff) | |
download | gdb-d3e9b40afb8e7bd09522044951cdce4710676c3e.zip gdb-d3e9b40afb8e7bd09522044951cdce4710676c3e.tar.gz gdb-d3e9b40afb8e7bd09522044951cdce4710676c3e.tar.bz2 |
sim/erc32: Switched emulated memory to host endian order.
Change data ordering in emulated memory from target order (big endian)
to host order. Improves performance and simplifies most memory
operations. Requires some byte twisting during stores on little
endian hosts (intel). Also removed support for little-endian binaries.
Diffstat (limited to 'sim/erc32/sis.h')
-rw-r--r-- | sim/erc32/sis.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h index ae39ad1..99ae347 100644 --- a/sim/erc32/sis.h +++ b/sim/erc32/sis.h @@ -28,8 +28,10 @@ #if WITH_HOST_BYTE_ORDER == BIG_ENDIAN #define HOST_BIG_ENDIAN +#define EBT 0 #else #define HOST_LITTLE_ENDIAN +#define EBT 3 #endif #define I_ACC_EXC 1 |