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author | Andrew Cagney <cagney@redhat.com> | 2002-07-14 00:15:20 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 2002-07-14 00:15:20 +0000 |
commit | 3fbeef0be80152e38e0b6966805f1dfc5c26df74 (patch) | |
tree | 40301ef32a7438c2bd037f05db12d278993e793b /sim/d30v/sim-main.h | |
parent | f971e29ff187b5c6efab9521e539801da35733e3 (diff) | |
download | gdb-3fbeef0be80152e38e0b6966805f1dfc5c26df74.zip gdb-3fbeef0be80152e38e0b6966805f1dfc5c26df74.tar.gz gdb-3fbeef0be80152e38e0b6966805f1dfc5c26df74.tar.bz2 |
Obsolete the d30v.
Diffstat (limited to 'sim/d30v/sim-main.h')
-rw-r--r-- | sim/d30v/sim-main.h | 164 |
1 files changed, 82 insertions, 82 deletions
diff --git a/sim/d30v/sim-main.h b/sim/d30v/sim-main.h index 4db8aa0..d1764da 100644 --- a/sim/d30v/sim-main.h +++ b/sim/d30v/sim-main.h @@ -1,82 +1,82 @@ -/* This file is part of the program psim. - - Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> - Copyright (C) 1997, 1998, Free Software Foundation - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - - */ - - -#ifndef _SIM_MAIN_H_ -#define _SIM_MAIN_H_ - -/* This simulator suports watchpoints */ -#define WITH_WATCHPOINTS 1 - -#include "sim-basics.h" -#include "sim-signal.h" - -/* needed */ -typedef address_word sim_cia; -#define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1) - -/* This simulator doesn't cache anything so no saving of context is - needed during either of a halt or restart */ -#define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0) -#define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0) - -#include "sim-base.h" - -/* These are generated files. */ -#include "itable.h" -#include "s_idecode.h" -#include "l_idecode.h" - -#include "cpu.h" -#include "alu.h" - - -struct sim_state { - - sim_event *pending_interrupt; - - /* the processors proper */ - sim_cpu cpu[MAX_NR_PROCESSORS]; -#if (WITH_SMP) -#define STATE_CPU(sd, n) (&(sd)->cpu[n]) -#else -#define STATE_CPU(sd, n) (&(sd)->cpu[0]) -#endif - - /* The base class. */ - sim_state_base base; - -}; - - -/* deliver an interrupt */ -sim_event_handler d30v_interrupt_event; - - -#ifdef HAVE_STRING_H -#include <string.h> -#else -#ifdef HAVE_STRINGS_H -#include <strings.h> -#endif -#endif - -#endif /* _SIM_MAIN_H_ */ +/* OBSOLETE /* This file is part of the program psim. */ +/* OBSOLETE */ +/* OBSOLETE Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> */ +/* OBSOLETE Copyright (C) 1997, 1998, Free Software Foundation */ +/* OBSOLETE */ +/* OBSOLETE This program is free software; you can redistribute it and/or modify */ +/* OBSOLETE it under the terms of the GNU General Public License as published by */ +/* OBSOLETE the Free Software Foundation; either version 2 of the License, or */ +/* OBSOLETE (at your option) any later version. */ +/* OBSOLETE */ +/* OBSOLETE This program is distributed in the hope that it will be useful, */ +/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */ +/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */ +/* OBSOLETE GNU General Public License for more details. */ +/* OBSOLETE */ +/* OBSOLETE You should have received a copy of the GNU General Public License */ +/* OBSOLETE along with this program; if not, write to the Free Software */ +/* OBSOLETE Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +/* OBSOLETE */ +/* OBSOLETE */ */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifndef _SIM_MAIN_H_ */ +/* OBSOLETE #define _SIM_MAIN_H_ */ +/* OBSOLETE */ +/* OBSOLETE /* This simulator suports watchpoints */ */ +/* OBSOLETE #define WITH_WATCHPOINTS 1 */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-basics.h" */ +/* OBSOLETE #include "sim-signal.h" */ +/* OBSOLETE */ +/* OBSOLETE /* needed */ */ +/* OBSOLETE typedef address_word sim_cia; */ +/* OBSOLETE #define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1) */ +/* OBSOLETE */ +/* OBSOLETE /* This simulator doesn't cache anything so no saving of context is */ +/* OBSOLETE needed during either of a halt or restart */ */ +/* OBSOLETE #define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0) */ +/* OBSOLETE #define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0) */ +/* OBSOLETE */ +/* OBSOLETE #include "sim-base.h" */ +/* OBSOLETE */ +/* OBSOLETE /* These are generated files. */ */ +/* OBSOLETE #include "itable.h" */ +/* OBSOLETE #include "s_idecode.h" */ +/* OBSOLETE #include "l_idecode.h" */ +/* OBSOLETE */ +/* OBSOLETE #include "cpu.h" */ +/* OBSOLETE #include "alu.h" */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE struct sim_state { */ +/* OBSOLETE */ +/* OBSOLETE sim_event *pending_interrupt; */ +/* OBSOLETE */ +/* OBSOLETE /* the processors proper */ */ +/* OBSOLETE sim_cpu cpu[MAX_NR_PROCESSORS]; */ +/* OBSOLETE #if (WITH_SMP) */ +/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[n]) */ +/* OBSOLETE #else */ +/* OBSOLETE #define STATE_CPU(sd, n) (&(sd)->cpu[0]) */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE /* The base class. */ */ +/* OBSOLETE sim_state_base base; */ +/* OBSOLETE */ +/* OBSOLETE }; */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE /* deliver an interrupt */ */ +/* OBSOLETE sim_event_handler d30v_interrupt_event; */ +/* OBSOLETE */ +/* OBSOLETE */ +/* OBSOLETE #ifdef HAVE_STRING_H */ +/* OBSOLETE #include <string.h> */ +/* OBSOLETE #else */ +/* OBSOLETE #ifdef HAVE_STRINGS_H */ +/* OBSOLETE #include <strings.h> */ +/* OBSOLETE #endif */ +/* OBSOLETE #endif */ +/* OBSOLETE */ +/* OBSOLETE #endif /* _SIM_MAIN_H_ */ */ |