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authorAndrew Cagney <cagney@redhat.com>2004-11-12 16:45:32 +0000
committerAndrew Cagney <cagney@redhat.com>2004-11-12 16:45:32 +0000
commitc46ec85da270994b50ccc5c8de0f1751cf3a0683 (patch)
treea5941765ceb8c03216c7a82f0a9f92c02b368a39 /sim/d30v/ic-d30v
parent4fab48b9c48377889af365990e148954c3343287 (diff)
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2004-11-12 Andrew Cagney <cagney@gnu.org>
* d30v, fr30, mn10200, z8k: Delete directory.
Diffstat (limited to 'sim/d30v/ic-d30v')
-rw-r--r--sim/d30v/ic-d30v80
1 files changed, 0 insertions, 80 deletions
diff --git a/sim/d30v/ic-d30v b/sim/d30v/ic-d30v
deleted file mode 100644
index bdf7ea2..0000000
--- a/sim/d30v/ic-d30v
+++ /dev/null
@@ -1,80 +0,0 @@
-# OBSOLETE # Instruction cache rules
-# OBSOLETE #
-# OBSOLETE # This file is part of the program psim.
-# OBSOLETE #
-# OBSOLETE # Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-# OBSOLETE #
-# OBSOLETE # This program is free software; you can redistribute it and/or modify
-# OBSOLETE # it under the terms of the GNU General Public License as published by
-# OBSOLETE # the Free Software Foundation; either version 2 of the License, or
-# OBSOLETE # (at your option) any later version.
-# OBSOLETE #
-# OBSOLETE # This program is distributed in the hope that it will be useful,
-# OBSOLETE # but WITHOUT ANY WARRANTY; without even the implied warranty of
-# OBSOLETE # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# OBSOLETE # GNU General Public License for more details.
-# OBSOLETE #
-# OBSOLETE # You should have received a copy of the GNU General Public License
-# OBSOLETE # along with this program; if not, write to the Free Software
-# OBSOLETE # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-# OBSOLETE #
-# OBSOLETE compute:RA:RA::
-# OBSOLETE compute:RA:Ra:signed32 *:(&GPR[RA])
-# OBSOLETE compute:RA:RaH:signed16 *:AH2_4(Ra)
-# OBSOLETE compute:RA:RaL:signed16 *:AL2_4(Ra)
-# OBSOLETE compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA])
-# OBSOLETE #
-# OBSOLETE compute:RB:RB::
-# OBSOLETE compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB])
-# OBSOLETE compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB])
-# OBSOLETE compute:RB:RbH:signed16:VH2_4(Rb)
-# OBSOLETE compute:RB:RbL:signed16:VL2_4(Rb)
-# OBSOLETE compute:RB:RbHU:unsigned16:VH2_4(Rb)
-# OBSOLETE compute:RB:RbLU:unsigned16:VL2_4(Rb)
-# OBSOLETE #
-# OBSOLETE compute:RC:RC::
-# OBSOLETE compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC])
-# OBSOLETE compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC])
-# OBSOLETE compute:RC:RcH:signed16:VH2_4(Rc)
-# OBSOLETE compute:RC:RcL:signed16:VL2_4(Rc)
-# OBSOLETE #
-# OBSOLETE #
-# OBSOLETE compute:IMM_6S:IMM_6S::
-# OBSOLETE compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6)
-# OBSOLETE # NB - for short imm[HL] are the same value
-# OBSOLETE compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31))
-# OBSOLETE compute:IMM_6S:immH:signed32:imm
-# OBSOLETE compute:IMM_6S:immL:signed32:imm
-# OBSOLETE compute:IMM_6S:imm_6:signed32:IMM_6S
-# OBSOLETE compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0)
-# OBSOLETE compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f)
-# OBSOLETE #
-# OBSOLETE compute:RC:pcdisp:signed32:(Rc & ~0x7)
-# OBSOLETE compute:RC:pcaddr:signed32:pcdisp
-# OBSOLETE #
-# OBSOLETE compute:IMM_18S:IMM_18S::
-# OBSOLETE compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3)
-# OBSOLETE compute:IMM_18S:pcaddr:signed32:pcdisp
-# OBSOLETE compute:IMM_12S:IMM_12S::
-# OBSOLETE compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3)
-# OBSOLETE compute:IMM_12S:pcaddr:signed32:pcdisp
-# OBSOLETE #
-# OBSOLETE compute:IMM_8L:IMM_8L::
-# OBSOLETE compute:IMM_18L:IMM_18L::
-# OBSOLETE compute:IMM_6L:IMM_6L::
-# OBSOLETE compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L)
-# OBSOLETE compute:IMM_6L:immHL:signed32:imm
-# OBSOLETE compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15)
-# OBSOLETE compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31)
-# OBSOLETE compute:IMM_6L:pcdisp:signed32:(imm & ~0x7)
-# OBSOLETE compute:IMM_6L:pcaddr:signed32:pcdisp
-# OBSOLETE #
-# OBSOLETE #
-# OBSOLETE compute:SRC_6:SRC_6::
-# OBSOLETE compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6])
-# OBSOLETE #
-# OBSOLETE #
-# OBSOLETE compute:AA:AA::
-# OBSOLETE compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA)
-# OBSOLETE compute:AB:AB::
-# OBSOLETE compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB)