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authorStan Shebs <shebs@codesourcery.com>1999-04-26 18:34:20 +0000
committerStan Shebs <shebs@codesourcery.com>1999-04-26 18:34:20 +0000
commit7a292a7adf506b866905b06b3024c0fd411c4583 (patch)
tree5b208bb48269b8a82d5c3a5f19c87b45a62a22f4 /sim/d30v/engine.c
parent1996fae84682e8ddd146215dd2959ad1ec924c09 (diff)
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import gdb-19990422 snapshot
Diffstat (limited to 'sim/d30v/engine.c')
-rw-r--r--sim/d30v/engine.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/sim/d30v/engine.c b/sim/d30v/engine.c
index 402a2f5..2bbaad1 100644
--- a/sim/d30v/engine.c
+++ b/sim/d30v/engine.c
@@ -134,9 +134,9 @@ unqueue_writes (SIM_DESC sd,
if (ptr == psw_addr)
{
- /* If MU instruction was not a MVTSYS (lkr), resolve PSW
+ /* If MU instruction was not a MVTSYS, resolve PSW
contention in favour of IU. */
- if(! STATE_CPU (sd, 0)->left_kills_right_p)
+ if(! STATE_CPU (sd, 0)->mvtsys_left_p)
{
/* Detect contention in parallel writes to the same PSW flags.
The hardware allows the updates from IU to prevail over
@@ -249,6 +249,7 @@ do_2_short (SIM_DESC sd,
/* run the first instruction */
STATE_CPU (sd, 0)->unit = unit;
STATE_CPU (sd, 0)->left_kills_right_p = 0;
+ STATE_CPU (sd, 0)->mvtsys_left_p = 0;
nia = s_idecode_issue(sd,
insn1,
cia);
@@ -267,6 +268,7 @@ do_2_short (SIM_DESC sd,
}
STATE_CPU (sd, 0)->left_kills_right_p = 0;
+ STATE_CPU (sd, 0)->mvtsys_left_p = 0;
return nia;
}
@@ -283,6 +285,7 @@ do_parallel (SIM_DESC sd,
/* run the first instruction */
STATE_CPU (sd, 0)->unit = memory_unit;
STATE_CPU (sd, 0)->left_kills_right_p = 0;
+ STATE_CPU (sd, 0)->mvtsys_left_p = 0;
nia_left = s_idecode_issue(sd,
left_insn,
cia);