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author | Nick Clifton <nickc@redhat.com> | 2000-05-29 19:26:48 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2000-05-29 19:26:48 +0000 |
commit | f23b768a5c29d6a233009281890598ae69e0434b (patch) | |
tree | 56c5a6fc095a8307a00ad31f6903fbb048c7b22f /sim/d30v/cpu.h | |
parent | ceec355905eb75b3bdbc030f118b771ae9d29c27 (diff) | |
download | gdb-f23b768a5c29d6a233009281890598ae69e0434b.zip gdb-f23b768a5c29d6a233009281890598ae69e0434b.tar.gz gdb-f23b768a5c29d6a233009281890598ae69e0434b.tar.bz2 |
replace GPR_SET with GPR_CLEAR
Diffstat (limited to 'sim/d30v/cpu.h')
-rw-r--r-- | sim/d30v/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/d30v/cpu.h b/sim/d30v/cpu.h index f848b61..56f749c 100644 --- a/sim/d30v/cpu.h +++ b/sim/d30v/cpu.h @@ -137,7 +137,7 @@ struct _sim_cpu { #define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr]) #define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr]) #define GPR (STATE_CPU (sd, 0)->regs.general_purpose) -#define GPR_SET(N,VAL) (GPR[(N)] = (VAL)) +#define GPR_CLEAR(N) (GPR[(N)] = 0) #define ACC (STATE_CPU (sd, 0)->regs.accumulator) #define CREG (STATE_CPU (sd, 0)->regs.control) #define SP (GPR[STACK_POINTER_GPR]) |