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authorMichael Meissner <gnu@the-meissners.org>1996-10-15 15:44:10 +0000
committerMichael Meissner <gnu@the-meissners.org>1996-10-15 15:44:10 +0000
commit57bc1a721a6b00bf4f01897cdba81ca42fa94f6d (patch)
tree2110550623484b141711058196ae6655c78e4045 /sim/d10v
parent684d50a53eb1b63c327205f2a712379cfa912da5 (diff)
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Better error messages when a program stops due to signal; support d10v getpid/kill
Diffstat (limited to 'sim/d10v')
-rw-r--r--sim/d10v/ChangeLog7
-rw-r--r--sim/d10v/interp.c119
-rw-r--r--sim/d10v/simops.c145
3 files changed, 231 insertions, 40 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 68a137d..5556044 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,10 @@
+Tue Oct 15 10:57:50 1996 Michael Meissner <meissner@tiktok.cygnus.com>
+
+ * simops.c (OP_5F00): Add support for getpid, kill system calls.
+
+ * interp.c (do_{2_short,parallel}): If an exception is raised,
+ don't execute the second instruction.
+
Sat Oct 12 22:17:43 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* simops.c (OP_{31000000,6601,6201,6200}): Store address in a
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index d34c116..11a18c4 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -180,7 +180,7 @@ do_2_short (ins1, ins2, leftright)
(h->ops->func)();
/* If the PC has changed (ie, a jump), don't do the second instruction */
- if (orig_pc == PC)
+ if (orig_pc == PC && !State.exception)
{
h = lookup_hash (ins2, 0);
get_operands (h->ops, ins2);
@@ -234,10 +234,13 @@ do_parallel (ins1, ins2)
State.ins_type = INS_LEFT_PARALLEL;
ins_type_counters[ (int)State.ins_type ]++;
(h1->ops->func)();
- get_operands (h2->ops, ins2);
- State.ins_type = INS_RIGHT_PARALLEL;
- ins_type_counters[ (int)State.ins_type ]++;
- (h2->ops->func)();
+ if (!State.exception)
+ {
+ get_operands (h2->ops, ins2);
+ State.ins_type = INS_RIGHT_PARALLEL;
+ ins_type_counters[ (int)State.ins_type ]++;
+ (h2->ops->func)();
+ }
}
}
@@ -261,6 +264,9 @@ sim_size (power)
exit(1);
}
+ State.mem_min = 1<<IMEM_SIZE;
+ State.mem_max = 0;
+
#ifdef DEBUG
if ((d10v_debug & DEBUG_MEMSIZE) != 0)
{
@@ -283,14 +289,21 @@ sim_write (addr, buffer, size)
unsigned char *buffer;
int size;
{
- int i;
init_system ();
- /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_write %d bytes to 0x%x\n",size,addr); */
- for (i = 0; i < size; i++)
- {
- State.imem[i+addr] = buffer[i];
- }
+#ifdef DEBUG
+ if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
+ (*d10v_callback->printf_filtered) (d10v_callback, "sim_write %d bytes to 0x%x, min = 0x%x, max = 0x%x\n",
+ size, addr, State.mem_min, State.mem_max);
+#endif
+
+ if (State.mem_min > addr)
+ State.mem_min = addr;
+
+ if (State.mem_max < addr+size-1)
+ State.mem_max = addr+size-1;
+
+ memcpy (State.imem+addr, buffer, size);
return size;
}
@@ -374,39 +387,50 @@ sim_resume (step, siggnal)
do
{
- inst = RLW (PC << 2);
- oldpc = PC;
- switch (inst & 0xC0000000)
+ uint32 byte_pc = ((uint32)PC) << 2;
+ if ((byte_pc < State.mem_min) || (byte_pc > State.mem_max))
{
- case 0xC0000000:
- /* long instruction */
- do_long (inst & 0x3FFFFFFF);
- break;
- case 0x80000000:
- /* R -> L */
- do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, 0);
- break;
- case 0x40000000:
- /* L -> R */
- do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, 1);
- break;
- case 0:
- do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
- break;
+ (*d10v_callback->printf_filtered) (d10v_callback,
+ "PC (0x%lx) out of range, oldpc = 0x%lx, min = 0x%lx, max = 0x%lx\n",
+ (long)byte_pc, (long)oldpc, (long)State.mem_min, (long)State.mem_max);
+ State.exception = SIGILL;
}
-
- if (State.RP && PC == RPT_E)
+ else
{
- RPT_C -= 1;
- if (RPT_C == 0)
- State.RP = 0;
- else
- PC = RPT_S;
- }
+ inst = RLW (byte_pc);
+ oldpc = PC;
+ switch (inst & 0xC0000000)
+ {
+ case 0xC0000000:
+ /* long instruction */
+ do_long (inst & 0x3FFFFFFF);
+ break;
+ case 0x80000000:
+ /* R -> L */
+ do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, 0);
+ break;
+ case 0x40000000:
+ /* L -> R */
+ do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, 1);
+ break;
+ case 0:
+ do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
+ break;
+ }
- /* FIXME */
- if (PC == oldpc)
- PC++;
+ if (State.RP && PC == RPT_E)
+ {
+ RPT_C -= 1;
+ if (RPT_C == 0)
+ State.RP = 0;
+ else
+ PC = RPT_S;
+ }
+
+ /* FIXME */
+ if (PC == oldpc)
+ PC++;
+ }
}
while (!State.exception);
}
@@ -463,10 +487,25 @@ sim_create_inferior (start_address, argv, env)
char **argv;
char **env;
{
+ uint8 *imem, *dmem;
+ uint32 mem_min, mem_max;
#ifdef DEBUG
if (d10v_debug)
(*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%x\n", start_address);
#endif
+ /* save memory pointers */
+ imem = State.imem;
+ dmem = State.dmem;
+ mem_min = State.mem_min;
+ mem_max = State.mem_max;
+ /* reset all state information */
+ memset (&State, 0, sizeof(State));
+ /* restore memory pointers */
+ State.imem = imem;
+ State.dmem = dmem;
+ State.mem_min = mem_min;
+ State.mem_max = mem_max;
+ /* set PC */
PC = start_address >> 2;
}
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index 5be3b79..e547f9b 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -2637,6 +2637,139 @@ OP_5F00 ()
trace_output (OP_R2);
break;
+ case SYS_getpid:
+ trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID);
+ RETVAL = getpid ();
+ trace_output (OP_R2);
+ break;
+
+ case SYS_kill:
+ trace_input ("<kill>", OP_REG, OP_REG, OP_VOID);
+ if (PARM1 == getpid ())
+ {
+ trace_output (OP_VOID);
+ State.exception = PARM2;
+ }
+ else
+ {
+ int os_sig = -1;
+ switch (PARM2)
+ {
+#ifdef SIGHUP
+ case 1: os_sig = SIGHUP; break;
+#endif
+#ifdef SIGINT
+ case 2: os_sig = SIGINT; break;
+#endif
+#ifdef SIGQUIT
+ case 3: os_sig = SIGQUIT; break;
+#endif
+#ifdef SIGILL
+ case 4: os_sig = SIGILL; break;
+#endif
+#ifdef SIGTRAP
+ case 5: os_sig = SIGTRAP; break;
+#endif
+#ifdef SIGABRT
+ case 6: os_sig = SIGABRT; break;
+#elif defined(SIGIOT)
+ case 6: os_sig = SIGIOT; break;
+#endif
+#ifdef SIGEMT
+ case 7: os_sig = SIGEMT; break;
+#endif
+#ifdef SIGFPE
+ case 8: os_sig = SIGFPE; break;
+#endif
+#ifdef SIGKILL
+ case 9: os_sig = SIGKILL; break;
+#endif
+#ifdef SIGBUS
+ case 10: os_sig = SIGBUS; break;
+#endif
+#ifdef SIGSEGV
+ case 11: os_sig = SIGSEGV; break;
+#endif
+#ifdef SIGSYS
+ case 12: os_sig = SIGSYS; break;
+#endif
+#ifdef SIGPIPE
+ case 13: os_sig = SIGPIPE; break;
+#endif
+#ifdef SIGALRM
+ case 14: os_sig = SIGALRM; break;
+#endif
+#ifdef SIGTERM
+ case 15: os_sig = SIGTERM; break;
+#endif
+#ifdef SIGURG
+ case 16: os_sig = SIGURG; break;
+#endif
+#ifdef SIGSTOP
+ case 17: os_sig = SIGSTOP; break;
+#endif
+#ifdef SIGTSTP
+ case 18: os_sig = SIGTSTP; break;
+#endif
+#ifdef SIGCONT
+ case 19: os_sig = SIGCONT; break;
+#endif
+#ifdef SIGCHLD
+ case 20: os_sig = SIGCHLD; break;
+#elif defined(SIGCLD)
+ case 20: os_sig = SIGCLD; break;
+#endif
+#ifdef SIGTTIN
+ case 21: os_sig = SIGTTIN; break;
+#endif
+#ifdef SIGTTOU
+ case 22: os_sig = SIGTTOU; break;
+#endif
+#ifdef SIGIO
+ case 23: os_sig = SIGIO; break;
+#elif defined (SIGPOLL)
+ case 23: os_sig = SIGPOLL; break;
+#endif
+#ifdef SIGXCPU
+ case 24: os_sig = SIGXCPU; break;
+#endif
+#ifdef SIGXFSZ
+ case 25: os_sig = SIGXFSZ; break;
+#endif
+#ifdef SIGVTALRM
+ case 26: os_sig = SIGVTALRM; break;
+#endif
+#ifdef SIGPROF
+ case 27: os_sig = SIGPROF; break;
+#endif
+#ifdef SIGWINCH
+ case 28: os_sig = SIGWINCH; break;
+#endif
+#ifdef SIGLOST
+ case 29: os_sig = SIGLOST; break;
+#endif
+#ifdef SIGUSR1
+ case 30: os_sig = SIGUSR1; break;
+#endif
+#ifdef SIGUSR2
+ case 31: os_sig = SIGUSR2; break;
+#endif
+ }
+
+ if (os_sig == -1)
+ {
+ trace_output (OP_VOID);
+ (*d10v_callback->printf_filtered) (d10v_callback, "Unknown signal %d\n", PARM2);
+ State.exception = SIGILL;
+ }
+ else
+ {
+ RETVAL = kill (PARM1, PARM2);
+ trace_output (OP_R2);
+ }
+ }
+ break;
+
case SYS_execve:
RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2),
(char **)MEMPTR (PARM3));
@@ -2676,6 +2809,18 @@ OP_5F00 ()
trace_output (OP_R2);
}
break;
+#else
+ case SYS_getpid:
+ trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID);
+ RETVAL = 1;
+ trace_output (OP_R2);
+ break;
+
+ case SYS_kill:
+ trace_input ("<kill>", OP_REG, OP_REG, OP_VOID);
+ trace_output (OP_VOID);
+ State.exception = PARM2;
+ break;
#endif
case SYS_read: