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| author | Andrew Cagney <cagney@redhat.com> | 1998-02-13 05:22:49 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-02-13 05:22:49 +0000 |
| commit | ac9a7d8a2cf9ffc4dbd869db4283002402cf595e (patch) | |
| tree | a6de094fb475c3616505fd820119df919797a699 /sim/d10v/simops.c | |
| parent | 93c6a010dc099f1ce3ec11872642d74822acd75f (diff) | |
| download | gdb-ac9a7d8a2cf9ffc4dbd869db4283002402cf595e.zip gdb-ac9a7d8a2cf9ffc4dbd869db4283002402cf595e.tar.gz gdb-ac9a7d8a2cf9ffc4dbd869db4283002402cf595e.tar.bz2 | |
Implement separate user (SPU) and interrupt (SPI) stack pointers.
Diffstat (limited to 'sim/d10v/simops.c')
| -rw-r--r-- | sim/d10v/simops.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index 9263c42..ef34f94 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -50,6 +50,7 @@ move_to_cr (int cr, reg_t val) switch (cr) { case PSW_CR: + State.sp[State.SM] = State.regs[SP_IDX]; /* save old SP */ State.SM = (val & PSW_SM_BIT) != 0; State.EA = (val & PSW_EA_BIT) != 0; State.DB = (val & PSW_DB_BIT) != 0; @@ -62,6 +63,7 @@ move_to_cr (int cr, reg_t val) State.F0 = (val & PSW_F0_BIT) != 0; State.F1 = (val & PSW_F1_BIT) != 0; State.C = (val & PSW_C_BIT) != 0; + State.regs[SP_IDX] = State.sp[State.SM]; /* restore new SP */ if (State.ST && !State.FX) { (*d10v_callback->printf_filtered) |