diff options
| author | Michael Meissner <gnu@the-meissners.org> | 1996-09-09 21:12:46 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1996-09-09 21:12:46 +0000 |
| commit | 2254cd90a9ce9460303b2585574b4bb219142bf4 (patch) | |
| tree | 31b9ad51c016607c7e401bbd6726e2963a313504 /sim/d10v/simops.c | |
| parent | 308f64d3ac2fe556f4f2aee0fbc4e3c8af24f9f3 (diff) | |
| download | gdb-2254cd90a9ce9460303b2585574b4bb219142bf4.zip gdb-2254cd90a9ce9460303b2585574b4bb219142bf4.tar.gz gdb-2254cd90a9ce9460303b2585574b4bb219142bf4.tar.bz2 | |
Addi needs to set the carry
Diffstat (limited to 'sim/d10v/simops.c')
| -rw-r--r-- | sim/d10v/simops.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index 1af4e09..b35a434 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -584,10 +584,15 @@ OP_17001202 () void OP_201 () { + uint tmp = State.regs[OP[0]]; if (OP[1] == 0) OP[1] = 16; trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID); State.regs[OP[0]] += OP[1]; + if (tmp > State.regs[OP[0]]) + State.C = 1; + else + State.C = 0; trace_output (OP_REG); } |