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author | Andrew Cagney <cagney@redhat.com> | 1998-02-13 05:22:49 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-02-13 05:22:49 +0000 |
commit | ac9a7d8a2cf9ffc4dbd869db4283002402cf595e (patch) | |
tree | a6de094fb475c3616505fd820119df919797a699 /sim/d10v/d10v_sim.h | |
parent | 93c6a010dc099f1ce3ec11872642d74822acd75f (diff) | |
download | gdb-ac9a7d8a2cf9ffc4dbd869db4283002402cf595e.zip gdb-ac9a7d8a2cf9ffc4dbd869db4283002402cf595e.tar.gz gdb-ac9a7d8a2cf9ffc4dbd869db4283002402cf595e.tar.bz2 |
Implement separate user (SPU) and interrupt (SPI) stack pointers.
Diffstat (limited to 'sim/d10v/d10v_sim.h')
-rw-r--r-- | sim/d10v/d10v_sim.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v_sim.h index df95426..665c529 100644 --- a/sim/d10v/d10v_sim.h +++ b/sim/d10v/d10v_sim.h @@ -75,10 +75,15 @@ enum _ins_type extern unsigned long ins_type_counters[ (int)INS_MAX ]; +enum { + SP_IDX = 15, +}; + struct _state { reg_t regs[16]; /* general-purpose registers */ reg_t cregs[16]; /* control registers */ + reg_t sp[2]; /* holding area for SPI(0)/SPU(1) */ int64 a[2]; /* accumulators */ uint8 SM; uint8 EA; |