diff options
author | Doug Evans <dje@google.com> | 2009-10-24 04:33:41 +0000 |
---|---|---|
committer | Doug Evans <dje@google.com> | 2009-10-24 04:33:41 +0000 |
commit | f09d60e19b823fd95f313d95449a933296ce6bc7 (patch) | |
tree | 93ca32e1b35b111644972ce66a89e25f00b54716 /sim/cris/cpuv10.h | |
parent | ac1e9eca7030ead24000a8ab765b573ab0d38de2 (diff) | |
download | gdb-f09d60e19b823fd95f313d95449a933296ce6bc7.zip gdb-f09d60e19b823fd95f313d95449a933296ce6bc7.tar.gz gdb-f09d60e19b823fd95f313d95449a933296ce6bc7.tar.bz2 |
* cris/arch.c: Regenerate.
* cris/arch.h: Regenerate.
* cris/cpuall.h: Regenerate.
* cris/cpuv10.c: Regenerate.
* cris/cpuv10.h: Regenerate.
* cris/cpuv32.c: Regenerate.
* cris/cpuv32.h: Regenerate.
* cris/cris-desc.c: Regenerate.
* cris/cris-desc.h: Regenerate.
* cris/cris-opc.h: Regenerate.
* cris/decodev10.c: Regenerate.
* cris/decodev10.h: Regenerate.
* cris/decodev32.c: Regenerate.
* cris/decodev32.h: Regenerate.
* cris/modelv10.c: Regenerate.
* cris/modelv32.c: Regenerate.
* cris/semcrisv10f-switch.c: Regenerate.
* cris/semcrisv32f-switch.c: Regenerate.
Diffstat (limited to 'sim/cris/cpuv10.h')
-rw-r--r-- | sim/cris/cpuv10.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/sim/cris/cpuv10.h b/sim/cris/cpuv10.h index 3700dd5..03a1be3 100644 --- a/sim/cris/cpuv10.h +++ b/sim/cris/cpuv10.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2007 Free Software Foundation, Inc. +Copyright 1996-2009 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -346,44 +346,44 @@ union sem_fields { INT f_s6; UINT f_operand2; unsigned char in_Rd; - unsigned char out_h_gr_SI_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_index_of__INT_Rd; } sfmt_andq; struct { /* */ INT f_indir_pc__dword; UINT f_operand2; unsigned char in_Rd; - unsigned char out_h_gr_SI_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_index_of__INT_Rd; } sfmt_addcdr; struct { /* */ INT f_indir_pc__word; UINT f_operand2; unsigned char in_Rd; - unsigned char out_h_gr_SI_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_index_of__INT_Rd; } sfmt_addcwr; struct { /* */ INT f_indir_pc__byte; UINT f_operand2; unsigned char in_Rd; - unsigned char out_h_gr_SI_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_index_of__INT_Rd; } sfmt_addcbr; struct { /* */ UINT f_operand1; UINT f_operand2; unsigned char in_Ps; - unsigned char out_h_gr_SI_index_of__DFLT_Rs; + unsigned char out_h_gr_SI_index_of__INT_Rs; } sfmt_move_spr_rv10; struct { /* */ UINT f_operand2; UINT f_u6; unsigned char in_Rd; - unsigned char out_h_gr_SI_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_index_of__INT_Rd; } sfmt_addq; struct { /* */ UINT f_operand1; UINT f_operand2; unsigned char in_Rd; unsigned char in_Rs; - unsigned char out_h_gr_SI_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_index_of__INT_Rd; } sfmt_add_b_r; struct { /* */ UINT f_operand1; @@ -425,7 +425,7 @@ union sem_fields { unsigned char in_Rd; unsigned char in_Rs; unsigned char out_Rs; - unsigned char out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__DFLT_inc_index_of__DFLT_Rs_index_of__DFLT_Rd; + unsigned char out_h_gr_SI_if__SI_andif__DFLT_prefix_set_not__UINT_inc_index_of__INT_Rs_index_of__INT_Rd; } sfmt_add_m_b_m; struct { /* */ UINT f_memmode; |