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author | Joel Brobecker <brobecker@adacore.com> | 2014-01-01 07:54:24 +0400 |
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committer | Joel Brobecker <brobecker@adacore.com> | 2014-01-01 07:54:24 +0400 |
commit | ecd75fc8eed3bde86036141228074a20e55dcfc9 (patch) | |
tree | 8f4a51f410949d8e3e7f03b005e798e7dfa2721d /sim/cr16/interp.c | |
parent | 28498c4207945d583481d50ba6b181d3ce60fa72 (diff) | |
download | gdb-ecd75fc8eed3bde86036141228074a20e55dcfc9.zip gdb-ecd75fc8eed3bde86036141228074a20e55dcfc9.tar.gz gdb-ecd75fc8eed3bde86036141228074a20e55dcfc9.tar.bz2 |
Update Copyright year range in all files maintained by GDB.
Diffstat (limited to 'sim/cr16/interp.c')
-rw-r--r-- | sim/cr16/interp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/cr16/interp.c b/sim/cr16/interp.c index 3af58f6..6006967 100644 --- a/sim/cr16/interp.c +++ b/sim/cr16/interp.c @@ -1,5 +1,5 @@ /* Simulation code for the CR16 processor. - Copyright (C) 2008-2013 Free Software Foundation, Inc. + Copyright (C) 2008-2014 Free Software Foundation, Inc. Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com> This file is part of GDB, the GNU debugger. |