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authorDimitar Dimitrov <dimitar@dinux.eu>2019-09-23 17:54:42 +0100
committerAndrew Burgess <andrew.burgess@embecosm.com>2019-09-23 22:11:02 +0100
commitddd44b7053386b82769c27c871a08c72e589e93e (patch)
treefdedd45defc0b083ca3445de34abfdba5d128981 /sim/configure
parentf945dedfd3512bfbca0f1405c8ea85684980e69a (diff)
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sim: Add PRU simulator port
A simulator port for the TI PRU I/O processor. v1: https://sourceware.org/ml/gdb-patches/2016-12/msg00143.html v2: https://sourceware.org/ml/gdb-patches/2017-02/msg00397.html v3: https://sourceware.org/ml/gdb-patches/2017-02/msg00516.html v4: https://sourceware.org/ml/gdb-patches/2018-06/msg00484.html v5: https://sourceware.org/ml/gdb-patches/2019-08/msg00584.html v6: https://sourceware.org/ml/gdb-patches/2019-09/msg00036.html gdb/ChangeLog: * NEWS: Mention new simulator port for PRU. sim/ChangeLog: * MAINTAINERS: Add myself as PRU maintainer. * configure: Regenerated. * configure.tgt: Add PRU. sim/common/ChangeLog: * gennltvals.sh: Add PRU libgloss target. * nltvals.def: Regenerate from the latest libgloss sources. sim/pru/ChangeLog: * Makefile.in: New file. * aclocal.m4: Regenerated. * config.in: Regenerated. * configure: Regenerated. * configure.ac: New file. * interp.c: New file. * pru.h: New file. * pru.isa: New file. * sim-main.h: New file.
Diffstat (limited to 'sim/configure')
-rwxr-xr-xsim/configure8
1 files changed, 8 insertions, 0 deletions
diff --git a/sim/configure b/sim/configure
index ca3fd67..72f95cd 100755
--- a/sim/configure
+++ b/sim/configure
@@ -686,6 +686,7 @@ mn10300
moxie
msp430
or1k
+pru
rl78
rx
sh64
@@ -3838,6 +3839,13 @@ subdirs="$subdirs aarch64"
;;
+ pru*-*-*)
+
+ sim_arch=pru
+ subdirs="$subdirs pru"
+
+
+ ;;
rl78-*-*)
sim_arch=rl78