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authorJason Molenda <jmolenda@apple.com>1999-12-07 03:56:43 +0000
committerJason Molenda <jmolenda@apple.com>1999-12-07 03:56:43 +0000
commitc2d11a7da0372ef052af1c74d56e264d8aae4743 (patch)
treeb2ceadb275bb9a170315ab66111c1f643c9ebf71 /sim/common
parent1e37c28164d4f504b2ae8189d0b82a862cfa323d (diff)
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import gdb-1999-12-06 snapshot
Diffstat (limited to 'sim/common')
-rw-r--r--sim/common/ChangeLog31
-rw-r--r--sim/common/cgen-accfp.c85
-rw-r--r--sim/common/cgen-par.c2
-rw-r--r--sim/common/cgen-par.h8
-rw-r--r--sim/common/cgen-trace.c2
5 files changed, 105 insertions, 23 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index c2d1c8c..1aa9ecc 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,34 @@
+1999-12-01 Dave Brolley <brolley@cygnus.com>
+
+ * cgen-accfp.c (subsf): Check status code.
+ (mulsf): Ditto.
+ (negsf): Ditto.
+ (abssf): Ditto.
+ (sqrtsf): Ditto.
+ (invsf): Ditto.
+ (minsf): Ditto.
+ (maxsf): Ditto.
+ (subdf): Ditto.
+ (muldf): Ditto.
+ (divdf): Ditto.
+ (negdf): Ditto.
+ (absdf): Ditto.
+ (sqrtdf): Ditto.
+ (invdf): Ditto.
+ (mindf): Ditto.
+ (maxdf): Ditto.
+
+1999-11-26 Dave Brolley <brolley@cygnus.com>
+
+ * cgen-par.h (fn_df_write): Mode of data is DF.
+ (sim_queue_fn_df_write): Mode of data is DF.
+ * cgen-par.c (sim_queue_fn_df_write): Mode of data is DF.
+
+1999-11-22 Dave Brolley <brolley@cygnus.com>
+
+ * cgen-trace.c (SIZE_TRACE_BUF): Inxrease size of trace buffer.
+ * cgen-par.h (CGEN_WRITE_QUEUE_SIZE): Increase size of queue.
+
1999-11-04 Dave Brolley <brolley@cygnus.com>
* cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_XI_WRITE and
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c
index 0ef61fd..e917522 100644
--- a/sim/common/cgen-accfp.c
+++ b/sim/common/cgen-accfp.c
@@ -42,10 +42,13 @@ subsf (CGEN_FPU* fpu, SF x, SF y)
sim_fpu op2;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
sim_fpu_32to (&op2, y);
- sim_fpu_sub (&ans, &op1, &op2);
+ status = sim_fpu_sub (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -58,10 +61,13 @@ mulsf (CGEN_FPU* fpu, SF x, SF y)
sim_fpu op2;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
sim_fpu_32to (&op2, y);
- sim_fpu_mul (&ans, &op1, &op2);
+ status = sim_fpu_mul (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -92,9 +98,12 @@ negsf (CGEN_FPU* fpu, SF x)
sim_fpu op1;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
- sim_fpu_neg (&ans, &op1);
+ status = sim_fpu_neg (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -106,9 +115,12 @@ abssf (CGEN_FPU* fpu, SF x)
sim_fpu op1;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
- sim_fpu_abs (&ans, &op1);
+ status = sim_fpu_abs (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -120,9 +132,12 @@ sqrtsf (CGEN_FPU* fpu, SF x)
sim_fpu op1;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
- sim_fpu_sqrt (&ans, &op1);
+ status = sim_fpu_sqrt (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -134,9 +149,12 @@ invsf (CGEN_FPU* fpu, SF x)
sim_fpu op1;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
- sim_fpu_inv (&ans, &op1);
+ status = sim_fpu_inv (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -149,10 +167,13 @@ minsf (CGEN_FPU* fpu, SF x, SF y)
sim_fpu op2;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
sim_fpu_32to (&op2, y);
- sim_fpu_min (&ans, &op1, &op2);
+ status = sim_fpu_min (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -165,10 +186,13 @@ maxsf (CGEN_FPU* fpu, SF x, SF y)
sim_fpu op2;
sim_fpu ans;
unsigned32 res;
+ sim_fpu_status status;
sim_fpu_32to (&op1, x);
sim_fpu_32to (&op2, y);
- sim_fpu_max (&ans, &op1, &op2);
+ status = sim_fpu_max (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to32 (&res, &ans);
return res;
@@ -354,10 +378,13 @@ subdf (CGEN_FPU* fpu, DF x, DF y)
sim_fpu op2;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
sim_fpu_64to (&op2, y);
- sim_fpu_sub (&ans, &op1, &op2);
+ status = sim_fpu_sub (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -370,10 +397,13 @@ muldf (CGEN_FPU* fpu, DF x, DF y)
sim_fpu op2;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
sim_fpu_64to (&op2, y);
- sim_fpu_mul (&ans, &op1, &op2);
+ status = sim_fpu_mul (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -386,10 +416,13 @@ divdf (CGEN_FPU* fpu, DF x, DF y)
sim_fpu op2;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
sim_fpu_64to (&op2, y);
- sim_fpu_div (&ans, &op1, &op2);
+ status = sim_fpu_div (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -401,9 +434,12 @@ negdf (CGEN_FPU* fpu, DF x)
sim_fpu op1;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
- sim_fpu_neg (&ans, &op1);
+ status = sim_fpu_neg (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -415,9 +451,12 @@ absdf (CGEN_FPU* fpu, DF x)
sim_fpu op1;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
- sim_fpu_abs (&ans, &op1);
+ status = sim_fpu_abs (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -429,9 +468,12 @@ sqrtdf (CGEN_FPU* fpu, DF x)
sim_fpu op1;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
- sim_fpu_sqrt (&ans, &op1);
+ status = sim_fpu_sqrt (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -443,9 +485,12 @@ invdf (CGEN_FPU* fpu, DF x)
sim_fpu op1;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
- sim_fpu_inv (&ans, &op1);
+ status = sim_fpu_inv (&ans, &op1);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -458,10 +503,13 @@ mindf (CGEN_FPU* fpu, DF x, DF y)
sim_fpu op2;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
sim_fpu_64to (&op2, y);
- sim_fpu_min (&ans, &op1, &op2);
+ status = sim_fpu_min (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
@@ -474,10 +522,13 @@ maxdf (CGEN_FPU* fpu, DF x, DF y)
sim_fpu op2;
sim_fpu ans;
unsigned64 res;
+ sim_fpu_status status;
sim_fpu_64to (&op1, x);
sim_fpu_64to (&op2, y);
- sim_fpu_max (&ans, &op1, &op2);
+ status = sim_fpu_max (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
sim_fpu_to64 (&res, &ans);
return res;
diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c
index fece2c9..44cc50f 100644
--- a/sim/common/cgen-par.c
+++ b/sim/common/cgen-par.c
@@ -142,7 +142,7 @@ void sim_queue_fn_xi_write (
void sim_queue_fn_df_write (
SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, DI),
+ void (*write_function)(SIM_CPU *cpu, UINT, DF),
UINT regno,
DF value
)
diff --git a/sim/common/cgen-par.h b/sim/common/cgen-par.h
index 6771e40..3748d94 100644
--- a/sim/common/cgen-par.h
+++ b/sim/common/cgen-par.h
@@ -73,8 +73,8 @@ typedef struct {
} fn_di_write;
struct {
UINT regno;
- DI value;
- void (*function)(SIM_CPU *, UINT, DI);
+ DF value;
+ void (*function)(SIM_CPU *, UINT, DF);
} fn_df_write;
struct {
UINT regno;
@@ -121,7 +121,7 @@ extern void cgen_write_queue_element_execute (
/* Instance of the queue for parallel write-after support. */
/* FIXME: Should be dynamic? */
-#define CGEN_WRITE_QUEUE_SIZE (4 * 4) /* 4 writes x 4 insns -- for now. */
+#define CGEN_WRITE_QUEUE_SIZE (64 * 4) /* 64 writes x 4 insns -- for now. */
typedef struct {
int index;
@@ -151,7 +151,7 @@ extern void sim_queue_pc_write (SIM_CPU *, USI);
extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UINT, UHI);
extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, SI);
extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI);
-extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DF);
+extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DF), UINT, DF);
extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *);
extern void sim_queue_fn_pc_write (SIM_CPU *, void (*)(SIM_CPU *, USI), USI);
diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c
index db852d5..4e382d4 100644
--- a/sim/common/cgen-trace.c
+++ b/sim/common/cgen-trace.c
@@ -51,7 +51,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#endif
#ifndef SIZE_TRACE_BUF
-#define SIZE_TRACE_BUF 256
+#define SIZE_TRACE_BUF 1024
#endif
static void