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| author | Richard Henderson <rth@redhat.com> | 2018-10-05 11:41:41 +0900 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2018-10-05 11:41:42 +0900 |
| commit | 07f5f4c683879e844d20d0d4963bbaf1b7cd47b9 (patch) | |
| tree | 872d6d64ac1dd790d76b214c2f7ae0150d51bdbb /sim/common | |
| parent | c8e98e3692cec125b92c995d8f881d9bdf1fac00 (diff) | |
| download | gdb-07f5f4c683879e844d20d0d4963bbaf1b7cd47b9.zip gdb-07f5f4c683879e844d20d0d4963bbaf1b7cd47b9.tar.gz gdb-07f5f4c683879e844d20d0d4963bbaf1b7cd47b9.tar.bz2 | |
or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns
Also fix the incorrect definitions of multiply and divide carry and
overflow float.
Changes to the instructions are made in the .cpu file, then we
regenerate the binutils and sim files.
The changes also required a few fixups for tests and additional sim helpers.
cpu/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
Stafford Horne <shorne@gmail.com>
* or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
(insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
(l-mul): Fix overflow support and indentation.
(l-mulu): Fix overflow support and indentation.
(l-muld, l-muldu, l-msbu, l-macu): New instructions.
(l-div); Remove incorrect carry behavior.
(l-divu): Fix carry and overflow behavior.
(l-mac): Add overflow support.
(l-msb, l-msbu): Add carry and overflow support.
opcodes/ChangeLog:
yyyy-mm-dd Richard Henderson <rth@twiddle.net>
Stafford Horne <shorne@gmail.com>
* or1k-desc.c: Regenerate.
* or1k-desc.h: Regenerate.
* or1k-opc.c: Regenerate.
* or1k-opc.h: Regenerate.
* or1k-opinst.c: Regenerate.
sim/common/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* cgen-ops.h (ADDCFDI): New function, add carry flag DI variant.
(ADDOFDI): New function, add overflow flag DI variant.
(SUBCFDI): New function, subtract carry flag DI variant.
(SUBOFDI): New function, subtract overflow flag DI variant.
sim/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* or1k/cpu.h: Regenerate.
* or1k/decode.c: Regenerate.
* or1k/decode.h: Regenerate.
* or1k/model.c: Regenerate.
* or1k/sem-switch.c: Regenerate.
* or1k/sem.c: Regenerate:
sim/testsuite/sim/or1k/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* div.S: Fix tests to match correct overflow/carry semantics.
* mul.S: Likewise.
gas/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* testsuite/gas/or1k/allinsn.s: Add instruction tests for
l.muld, l.muldu, l.macu, l.msb, l.msbu.
* testsuite/gas/or1k/allinsn.d: Add test results for new
instructions.
Diffstat (limited to 'sim/common')
| -rw-r--r-- | sim/common/ChangeLog | 7 | ||||
| -rw-r--r-- | sim/common/cgen-ops.h | 36 |
2 files changed, 43 insertions, 0 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 1f6cba2..e59ee01 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,10 @@ +2018-10-05 Stafford Horne <shorne@gmail.com> + + * cgen-ops.h (ADDCFDI): New function, add carry flag DI variant. + (ADDOFDI): New function, add overflow flag DI variant. + (SUBCFDI): New function, subtract carry flag DI variant. + (SUBOFDI): New function, subtract overflow flag DI variant. + 2018-09-28 Компан, Вячеслав Олегович <kompan.vo@phystech.edu> * sim-core.h (sim_cpu_core): Rename cpu_core.xor to diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h index 87ca483..0ce7e58 100644 --- a/sim/common/cgen-ops.h +++ b/sim/common/cgen-ops.h @@ -647,6 +647,38 @@ MUL1OFSI (USI a, USI b) return res; } +SEMOPS_INLINE BI +ADDCFDI (DI a, DI b, BI c) +{ + DI tmp = ADDDI (a, ADDDI (b, c)); + BI res = ((UDI) tmp < (UDI) a) || (c && tmp == a); + return res; +} + +SEMOPS_INLINE BI +ADDOFDI (DI a, DI b, BI c) +{ + DI tmp = ADDDI (a, ADDDI (b, c)); + BI res = (((a < 0) == (b < 0)) + && ((a < 0) != (tmp < 0))); + return res; +} + +SEMOPS_INLINE BI +SUBCFDI (DI a, DI b, BI c) +{ + BI res = ((UDI) a < (UDI) b) || (c && a == b); + return res; +} + +SEMOPS_INLINE BI +SUBOFDI (DI a, DI b, BI c) +{ + DI tmp = SUBDI (a, ADDSI (b, c)); + BI res = (((a < 0) != (b < 0)) + && ((a < 0) != (tmp < 0))); + return res; +} #else SI ADDCSI (SI, SI, BI); @@ -669,6 +701,10 @@ UBI SUBCFQI (QI, QI, BI); UBI SUBOFQI (QI, QI, BI); BI MUL1OFSI (SI a, SI b); BI MUL2OFSI (SI a, SI b); +BI ADDCFDI (DI a, DI b, BI c); +BI ADDOFDI (DI a, DI b, BI c); +BI SUBCFDI (DI a, DI b, BI c); +BI SUBOFDI (DI a, DI b, BI c); #endif |