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author | Andrew Cagney <cagney@redhat.com> | 1998-02-24 03:42:27 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-02-24 03:42:27 +0000 |
commit | d3e1d5941439d9f38eb0d35aa58da2c1790e6416 (patch) | |
tree | 078e6e67dc066c209df33996400e9c64f421e084 /sim/common/sim-trace.h | |
parent | b4d2f483b3a429785c2bb57625220b7bee737ea1 (diff) | |
download | gdb-d3e1d5941439d9f38eb0d35aa58da2c1790e6416.zip gdb-d3e1d5941439d9f38eb0d35aa58da2c1790e6416.tar.gz gdb-d3e1d5941439d9f38eb0d35aa58da2c1790e6416.tar.bz2 |
Add tracing to r5900 p* instructions.
Diffstat (limited to 'sim/common/sim-trace.h')
-rw-r--r-- | sim/common/sim-trace.h | 49 |
1 files changed, 48 insertions, 1 deletions
diff --git a/sim/common/sim-trace.h b/sim/common/sim-trace.h index 374681d..0cd344b 100644 --- a/sim/common/sim-trace.h +++ b/sim/common/sim-trace.h @@ -257,6 +257,19 @@ extern void trace_input_word3 PARAMS ((SIM_DESC sd, unsigned_word d1, unsigned_word d2)); +extern void trace_input_word4 PARAMS ((SIM_DESC sd, + sim_cpu *cpu, + int trace_idx, + unsigned_word d0, + unsigned_word d1, + unsigned_word d2, + unsigned_word d3)); + +extern void trace_input_addr1 PARAMS ((SIM_DESC sd, + sim_cpu *cpu, + int trace_idx, + address_word d0)); + extern void trace_input_bool1 PARAMS ((SIM_DESC sd, sim_cpu *cpu, int trace_idx, @@ -305,6 +318,20 @@ extern void trace_result_word1 PARAMS ((SIM_DESC sd, int trace_idx, unsigned_word r0)); +extern void trace_result_word2 PARAMS ((SIM_DESC sd, + sim_cpu *cpu, + int trace_idx, + unsigned_word r0, + unsigned_word r1)); + +extern void trace_result_word4 PARAMS ((SIM_DESC sd, + sim_cpu *cpu, + int trace_idx, + unsigned_word r0, + unsigned_word r1, + unsigned_word r2, + unsigned_word r3)); + extern void trace_result_bool1 PARAMS ((SIM_DESC sd, sim_cpu *cpu, int trace_idx, @@ -365,12 +392,32 @@ do { \ trace_input_word3 (SD, CPU, TRACE_ALU_IDX, (V0), (V1), (V2)); \ } while (0) -#define TRACE_ALU_RESULT(R0) \ +#define TRACE_ALU_INPUT4(V0,V1,V2,V3) \ +do { \ + if (TRACE_ALU_P (CPU)) \ + trace_input_word4 (SD, CPU, TRACE_ALU_IDX, (V0), (V1), (V2), (V3)); \ +} while (0) + +#define TRACE_ALU_RESULT(R0) TRACE_ALU_RESULT1(R0) + +#define TRACE_ALU_RESULT1(R0) \ do { \ if (TRACE_ALU_P (CPU)) \ trace_result_word1 (SD, CPU, TRACE_ALU_IDX, (R0)); \ } while (0) +#define TRACE_ALU_RESULT2(R0,R1) \ +do { \ + if (TRACE_ALU_P (CPU)) \ + trace_result_word2 (SD, CPU, TRACE_ALU_IDX, (R0), (R1)); \ +} while (0) + +#define TRACE_ALU_RESULT4(R0,R1,R2,R3) \ +do { \ + if (TRACE_ALU_P (CPU)) \ + trace_result_word4 (SD, CPU, TRACE_ALU_IDX, (R0), (R1), (R2), (R3)); \ +} while (0) + /* Macro's for tracing FPU instructions */ |