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author | Andrew Cagney <cagney@redhat.com> | 1997-05-19 03:42:33 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1997-05-19 03:42:33 +0000 |
commit | f03b093cd34bc352ad89334a43a34b00a5e5c60c (patch) | |
tree | b9d428d2bdf6dd5f5f5a25a7df7580c3836af9e4 /sim/common/sim-run.c | |
parent | 11ab132f168d3c24d4b4d743d86599973b17e3f2 (diff) | |
download | gdb-f03b093cd34bc352ad89334a43a34b00a5e5c60c.zip gdb-f03b093cd34bc352ad89334a43a34b00a5e5c60c.tar.gz gdb-f03b093cd34bc352ad89334a43a34b00a5e5c60c.tar.bz2 |
o Implement generic halt/restart/abort module.
Use in tic80 and d30v simulators.
o Add signal hook to sim-core module
Diffstat (limited to 'sim/common/sim-run.c')
-rw-r--r-- | sim/common/sim-run.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/sim/common/sim-run.c b/sim/common/sim-run.c new file mode 100644 index 0000000..82aee67 --- /dev/null +++ b/sim/common/sim-run.c @@ -0,0 +1,45 @@ +/* Generic simulator run. + Copyright (C) 1997 Free Software Foundation, Inc. + Contributed by Cygnus Support. + +This file is part of GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "sim-main.h" + +/* Generic implementation of sim_engine_run that works within the + sim_engine setjmp/longjmp framework. */ + +void +sim_engine_run (SIM_DESC sd, + int next_cpu_nr, /* ignore */ + int siggnal) /* ignore */ +{ + sim_cia cia; + sim_cpu *cpu = STATE_CPU (sd, 0); + cia = cpu->cia; + while (1) + { + instruction_word insn = IMEM (cia); + cia = idecode_issue (sd, insn, cia); + /* process any events */ + if (sim_events_tick (sd)) + { + cpu->cia = cia; + sim_events_process (sd); + } + } +} |