diff options
author | Doug Evans <dje@google.com> | 1998-10-07 23:55:42 +0000 |
---|---|---|
committer | Doug Evans <dje@google.com> | 1998-10-07 23:55:42 +0000 |
commit | 99bc9a6984f71f42d7ab877529894e2db9809768 (patch) | |
tree | 960da4347ac3c13f780292ba4e1cf4365d9eefe7 /sim/common/sim-reg.c | |
parent | 9b6b08c2c0f7a1e2f4f29aa871f8eca2aa7b6aef (diff) | |
download | gdb-99bc9a6984f71f42d7ab877529894e2db9809768.zip gdb-99bc9a6984f71f42d7ab877529894e2db9809768.tar.gz gdb-99bc9a6984f71f42d7ab877529894e2db9809768.tar.bz2 |
cgen-run.c: new mainloop for cgen
sim-reg.c: generic sim_fetch/store_register interface fns
Diffstat (limited to 'sim/common/sim-reg.c')
-rw-r--r-- | sim/common/sim-reg.c | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/sim/common/sim-reg.c b/sim/common/sim-reg.c new file mode 100644 index 0000000..3f3dc41 --- /dev/null +++ b/sim/common/sim-reg.c @@ -0,0 +1,52 @@ +/* Generic register read/write. + Copyright (C) 1998 Free Software Foundation, Inc. + Contributed by Cygnus Solutions. + +This file is part of GDB, the GNU debugger. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "sim-main.h" +#include "sim-assert.h" + +/* Generic implementation of sim_fetch_register for simulators using + CPU_REG_FETCH. + The contents of BUF are in target byte order. */ +/* ??? Obviously the interface needs to be extended to handle multiple + cpus. */ + +int +sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length) +{ + SIM_CPU *cpu = STATE_CPU (sd, 0); + + SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length); +} + +/* Generic implementation of sim_fetch_register for simulators using + CPU_REG_FETCH. + The contents of BUF are in target byte order. */ +/* ??? Obviously the interface needs to be extended to handle multiple + cpus. */ + +int +sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length) +{ + SIM_CPU *cpu = STATE_CPU (sd, 0); + + SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); + return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length); +} |