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authorAndrew Cagney <cagney@redhat.com>1997-10-27 03:00:12 +0000
committerAndrew Cagney <cagney@redhat.com>1997-10-27 03:00:12 +0000
commitf45dd42b32b0ea4b3eb27c180e64805b9fb548c6 (patch)
tree21067f5a15e99f60df1c8ea825550f5b1712e3cd /sim/common/sim-endian.h
parent635ae9cb7cd6337401ab81144b31f6bc33e20b10 (diff)
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gdb-f45dd42b32b0ea4b3eb27c180e64805b9fb548c6.tar.gz
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Add 128 bit transfers to sim core.
Diffstat (limited to 'sim/common/sim-endian.h')
-rw-r--r--sim/common/sim-endian.h78
1 files changed, 66 insertions, 12 deletions
diff --git a/sim/common/sim-endian.h b/sim/common/sim-endian.h
index 573b0e1..a9767e9 100644
--- a/sim/common/sim-endian.h
+++ b/sim/common/sim-endian.h
@@ -30,41 +30,49 @@ INLINE_SIM_ENDIAN(unsigned_1) endian_h2t_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) endian_h2t_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) endian_h2t_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) endian_h2t_16(unsigned_16 x);
INLINE_SIM_ENDIAN(unsigned_1) endian_t2h_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) endian_t2h_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) endian_t2h_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) endian_t2h_16(unsigned_16 x);
INLINE_SIM_ENDIAN(unsigned_1) swap_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) swap_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) swap_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) swap_16(unsigned_16 x);
INLINE_SIM_ENDIAN(unsigned_1) endian_h2be_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) endian_h2be_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) endian_h2be_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) endian_h2be_16(unsigned_16 x);
INLINE_SIM_ENDIAN(unsigned_1) endian_be2h_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) endian_be2h_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) endian_be2h_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) endian_be2h_16(unsigned_16 x);
INLINE_SIM_ENDIAN(unsigned_1) endian_h2le_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) endian_h2le_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) endian_h2le_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) endian_h2le_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) endian_h2le_16(unsigned_16 x);
INLINE_SIM_ENDIAN(unsigned_1) endian_le2h_1(unsigned_1 x);
INLINE_SIM_ENDIAN(unsigned_2) endian_le2h_2(unsigned_2 x);
INLINE_SIM_ENDIAN(unsigned_4) endian_le2h_4(unsigned_4 x);
INLINE_SIM_ENDIAN(unsigned_8) endian_le2h_8(unsigned_8 x);
+INLINE_SIM_ENDIAN(unsigned_16) endian_le2h_16(unsigned_16 x);
-INLINE_SIM_ENDIAN(void*) offset_1(unsigned_1 *x, int ws, int w);
-INLINE_SIM_ENDIAN(void*) offset_2(unsigned_2 *x, int ws, int w);
-INLINE_SIM_ENDIAN(void*) offset_4(unsigned_4 *x, int ws, int w);
-INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, int ws, int w);
+INLINE_SIM_ENDIAN(void*) offset_1(unsigned_1 *x, unsigned ws, unsigned w);
+INLINE_SIM_ENDIAN(void*) offset_2(unsigned_2 *x, unsigned ws, unsigned w);
+INLINE_SIM_ENDIAN(void*) offset_4(unsigned_4 *x, unsigned ws, unsigned w);
+INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, unsigned ws, unsigned w);
+INLINE_SIM_ENDIAN(void*) offset_16(unsigned_16 *x, unsigned ws, unsigned w);
/* SWAP */
@@ -73,6 +81,7 @@ INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, int ws, int w);
#define SWAP_2(X) swap_2(X)
#define SWAP_4(X) swap_4(X)
#define SWAP_8(X) swap_8(X)
+#define SWAP_16(X) swap_16(X)
/* HOST to BE */
@@ -81,10 +90,12 @@ INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, int ws, int w);
#define H2BE_2(X) endian_h2be_2(X)
#define H2BE_4(X) endian_h2be_4(X)
#define H2BE_8(X) endian_h2be_8(X)
+#define H2BE_16(X) endian_h2be_16(X)
#define BE2H_1(X) endian_be2h_1(X)
#define BE2H_2(X) endian_be2h_2(X)
#define BE2H_4(X) endian_be2h_4(X)
#define BE2H_8(X) endian_be2h_8(X)
+#define BE2H_16(X) endian_be2h_16(X)
/* HOST to LE */
@@ -93,10 +104,12 @@ INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, int ws, int w);
#define H2LE_2(X) endian_h2le_2(X)
#define H2LE_4(X) endian_h2le_4(X)
#define H2LE_8(X) endian_h2le_8(X)
+#define H2LE_16(X) endian_h2le_16(X)
#define LE2H_1(X) endian_le2h_1(X)
#define LE2H_2(X) endian_le2h_2(X)
#define LE2H_4(X) endian_le2h_4(X)
#define LE2H_8(X) endian_le2h_8(X)
+#define LE2H_16(X) endian_le2h_16(X)
/* HOST to TARGET */
@@ -105,10 +118,12 @@ INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, int ws, int w);
#define H2T_2(X) endian_h2t_2(X)
#define H2T_4(X) endian_h2t_4(X)
#define H2T_8(X) endian_h2t_8(X)
+#define H2T_16(X) endian_h2t_16(X)
#define T2H_1(X) endian_t2h_1(X)
#define T2H_2(X) endian_t2h_2(X)
#define T2H_4(X) endian_t2h_4(X)
#define T2H_8(X) endian_t2h_8(X)
+#define T2H_16(X) endian_t2h_16(X)
/* CONVERT IN PLACE
@@ -123,6 +138,7 @@ do { \
case 2: VARIABLE = H2T_2(VARIABLE); break; \
case 4: VARIABLE = H2T_4(VARIABLE); break; \
case 8: VARIABLE = H2T_8(VARIABLE); break; \
+ case 16: VARIABLE = H2T_16(VARIABLE); break; \
} \
} while (0)
@@ -133,6 +149,7 @@ do { \
case 2: VARIABLE = T2H_2(VARIABLE); break; \
case 4: VARIABLE = T2H_4(VARIABLE); break; \
case 8: VARIABLE = T2H_8(VARIABLE); break; \
+ case 16: VARIABLE = T2H_16(VARIABLE); break; \
} \
} while (0)
@@ -143,6 +160,7 @@ do { \
case 2: VARIABLE = SWAP_2(VARIABLE); break; \
case 4: VARIABLE = SWAP_4(VARIABLE); break; \
case 8: VARIABLE = SWAP_8(VARIABLE); break; \
+ case 16: VARIABLE = SWAP_16(VARIABLE); break; \
} \
} while (0)
@@ -153,6 +171,7 @@ do { \
case 2: VARIABLE = H2BE_2(VARIABLE); break; \
case 4: VARIABLE = H2BE_4(VARIABLE); break; \
case 8: VARIABLE = H2BE_8(VARIABLE); break; \
+ case 16: VARIABLE = H2BE_16(VARIABLE); break; \
} \
} while (0)
@@ -163,6 +182,7 @@ do { \
case 2: VARIABLE = BE2H_2(VARIABLE); break; \
case 4: VARIABLE = BE2H_4(VARIABLE); break; \
case 8: VARIABLE = BE2H_8(VARIABLE); break; \
+ case 16: VARIABLE = BE2H_16(VARIABLE); break; \
} \
} while (0)
@@ -173,6 +193,7 @@ do { \
case 2: VARIABLE = H2LE_2(VARIABLE); break; \
case 4: VARIABLE = H2LE_4(VARIABLE); break; \
case 8: VARIABLE = H2LE_8(VARIABLE); break; \
+ case 16: VARIABLE = H2LE_16(VARIABLE); break; \
} \
} while (0)
@@ -183,6 +204,7 @@ do { \
case 2: VARIABLE = LE2H_2(VARIABLE); break; \
case 4: VARIABLE = LE2H_4(VARIABLE); break; \
case 8: VARIABLE = LE2H_8(VARIABLE); break; \
+ case 16: VARIABLE = LE2H_16(VARIABLE); break; \
} \
} while (0)
@@ -243,6 +265,9 @@ do { \
#define AH4_8(X) (unsigned_4*)offset_8((X), 4, 0)
#define AL4_8(X) (unsigned_4*)offset_8((X), 4, 1)
+#define AH8_16(X) (unsigned_8*)offset_16((X), 8, 0)
+#define AL8_16(X) (unsigned_8*)offset_16((X), 8, 1)
+
#if (WITH_TARGET_WORD_BITSIZE == 64)
#define AH_word(X) AH4_8(X)
#define AL_word(X) AL4_8(X)
@@ -262,6 +287,10 @@ do { \
#define A2_8(X,N) (unsigned_2*)offset_8((X), 2, (N))
#define A4_8(X,N) (unsigned_4*)offset_8((X), 4, (N))
+#define A1_16(X,N) (unsigned_1*)offset_16((X), 1, (N))
+#define A2_16(X,N) (unsigned_2*)offset_16((X), 2, (N))
+#define A4_16(X,N) (unsigned_4*)offset_16((X), 4, (N))
+#define A8_16(X,N) (unsigned_8*)offset_16((X), 8, (N))
@@ -279,6 +308,9 @@ do { \
#define VH4_8(X) ((unsigned_4)((unsigned_8)(X) >> 32))
#define VL4_8(X) ((unsigned_4)(X))
+#define VH8_16(X) ((unsigned_8)((unsigned_16)(X) >> 64))
+#define VL8_16(X) ((unsigned_8)(X))
+
#if (WITH_TARGET_WORD_BITSIZE == 64)
#define VH_word(X) VH4_8(X)
#define VL_word(X) VL4_8(X)
@@ -290,14 +322,19 @@ do { \
#define V1_2(X,N) ((unsigned_1)((unsigned_2)(X) >> ( 8 * (1 - (N)))))
-#define V1_4(X,N) ((unsigned_1)((unsigned_4)(X) >> ( 8 * (3 - (N)))))
-#define V1_8(X,N) ((unsigned_1)((unsigned_8)(X) >> ( 8 * (7 - (N)))))
+#define V1_4(X,N) ((unsigned_1)((unsigned_4)(X) >> ( 8 * (3 - (N)))))
#define V2_4(X,N) ((unsigned_2)((unsigned_4)(X) >> (16 * (1 - (N)))))
-#define V2_8(X,N) ((unsigned_2)((unsigned_8)(X) >> (16 * (3 - (N)))))
+#define V1_8(X,N) ((unsigned_1)((unsigned_8)(X) >> ( 8 * (7 - (N)))))
+#define V2_8(X,N) ((unsigned_2)((unsigned_8)(X) >> (16 * (3 - (N)))))
#define V4_8(X,N) ((unsigned_4)((unsigned_8)(X) >> (32 * (1 - (N)))))
+#define V1_16(X,N) (*A1_16 (&(X),N))
+#define V2_16(X,N) (*A2_16 (&(X),N))
+#define V4_16(X,N) (*A4_16 (&(X),N))
+#define V8_16(X,N) (*A8_16 (&(X),N))
+
/* Reverse - insert sub-word into word quantity */
@@ -310,16 +347,24 @@ do { \
#define V8_H4(X) ((unsigned_8)(unsigned_4)(X) << 32)
#define V8_L4(X) ((unsigned_8)(unsigned_4)(X))
+#define V16_H8(X) ((unsigned_16)(unsigned_8)(X) << 64)
+#define V16_L8(X) ((unsigned_16)(unsigned_8)(X))
+
#define V2_1(X,N) ((unsigned_2)(unsigned_1)(X) << ( 8 * (1 - (N))))
-#define V4_1(X,N) ((unsigned_4)(unsigned_1)(X) << ( 8 * (3 - (N))))
-#define V8_1(X,N) ((unsigned_8)(unsigned_1)(X) << ( 8 * (7 - (N))))
+#define V4_1(X,N) ((unsigned_4)(unsigned_1)(X) << ( 8 * (3 - (N))))
#define V4_2(X,N) ((unsigned_4)(unsigned_2)(X) << (16 * (1 - (N))))
-#define V8_2(X,N) ((unsigned_8)(unsigned_2)(X) << (16 * (3 - (N))))
+#define V8_1(X,N) ((unsigned_8)(unsigned_1)(X) << ( 8 * (7 - (N))))
+#define V8_2(X,N) ((unsigned_8)(unsigned_2)(X) << (16 * (3 - (N))))
#define V8_4(X,N) ((unsigned_8)(unsigned_4)(X) << (32 * (1 - (N))))
+#define V16_1(X,N) ((unsigned_16)(unsigned_1)(X) << ( 8 * (15 - (N))))
+#define V16_2(X,N) ((unsigned_16)(unsigned_2)(X) << (16 * (7 - (N))))
+#define V16_4(X,N) ((unsigned_16)(unsigned_4)(X) << (32 * (3 - (N))))
+#define V16_8(X,N) ((unsigned_16)(unsigned_8)(X) << (64 * (1 - (N))))
+
/* Reverse - insert N sub-words into single word quantity */
@@ -328,11 +373,22 @@ do { \
#define U8_1(I0,I1,I2,I3,I4,I5,I6,I7) \
(V8_1(I0,0) | V8_1(I1,1) | V8_1(I2,2) | V8_1(I3,3) \
| V8_1(I4,4) | V8_1(I5,5) | V8_1(I6,6) | V8_1(I7,7))
+#define U16_1(I0,I1,I2,I3,I4,I5,I6,I7,I8,I9,I10,I11,I12,I13,I14,I15) \
+(V16_1(I0,0) | V16_1(I1,1) | V16_1(I2,2) | V16_1(I3,3) \
+ | V16_1(I4,4) | V16_1(I5,5) | V16_1(I6,6) | V16_1(I7,7) \
+ | V16_1(I8,8) | V16_1(I9,9) | V16_1(I10,10) | V16_1(I11,11) \
+ | V16_1(I12,12) | V16_1(I13,13) | V16_1(I14,14) | V16_1(I15,15))
#define U4_2(I0,I1) (V4_2(I0,0) | V4_2(I1,1))
#define U8_2(I0,I1,I2,I3) (V8_2(I0,0) | V8_2(I1,1) | V8_2(I2,2) | V8_2(I3,3))
+#define U16_2(I0,I1,I2,I3,I4,I5,I6,I7) \
+(V16_2(I0,0) | V16_2(I1,1) | V16_2(I2,2) | V16_2(I3,3) \
+ | V16_2(I4,4) | V16_2(I5,5) | V16_2(I6,6) | V16_2(I7,7) )
#define U8_4(I0,I1) (V8_4(I0,0) | V8_4(I1,1))
+#define U16_4(I0,I1,I2,I3) (V16_4(I0,0) | V16_4(I1,1) | V16_4(I2,2) | V16_4(I3,3))
+
+#define U16_8(I0,I1) (V16_8(I0,0) | V16_8(I1,1))
#if (WITH_TARGET_WORD_BITSIZE == 64)
@@ -347,8 +403,6 @@ do { \
-
-
#if (SIM_ENDIAN_INLINE & INCLUDE_MODULE)
# include "sim-endian.c"
#endif