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| author | Andrew Cagney <cagney@redhat.com> | 1997-05-05 13:21:04 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-05-05 13:21:04 +0000 |
| commit | 7a418800c16e72cc1f902ad19e0e81d1a6d66576 (patch) | |
| tree | 06e7375d21160e5d650d31e99c42f5b6bca2b3e6 /sim/common/sim-base.h | |
| parent | 3971886ac1616c4125531e42a884f031e27f7e21 (diff) | |
| download | gdb-7a418800c16e72cc1f902ad19e0e81d1a6d66576.zip gdb-7a418800c16e72cc1f902ad19e0e81d1a6d66576.tar.gz gdb-7a418800c16e72cc1f902ad19e0e81d1a6d66576.tar.bz2 | |
Start of implementation of a distributed (between processors)
simulator core object.
Diffstat (limited to 'sim/common/sim-base.h')
| -rw-r--r-- | sim/common/sim-base.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sim/common/sim-base.h b/sim/common/sim-base.h index 7418826..ffbdc16 100644 --- a/sim/common/sim-base.h +++ b/sim/common/sim-base.h @@ -201,6 +201,10 @@ typedef struct { SIM_DESC state; #define CPU_STATE(cpu) ((cpu)->base.state) + /* Processor specific core data */ +#define CPU_CORE(cpu) (& (cpu)->base.core) + sim_cpu_core core; + /* Trace data. See sim-trace.h. */ TRACE_DATA trace_data; #define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data) |